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GlobalFoundries Details 7 nm Plans: Three Generations, 700 mm², HVM in 2018 (anandtech.com)
83 points by vanburen on June 23, 2017 | hide | past | favorite | 44 comments


Seeing these advances in feature size always makes me wonder: is there a guide anywhere for making your own, maybe mm-scale, dies? Would the physics work at that large scale? It could be a cool way to demonstrate the concepts.

Like, you can make your own capacitors by rolling up two interleaved sheets of baking paper and aluminum foil. Because of the large scale of the gap between the conductive layers, you'll have trouble breaking a few nF of capacitance. It will likely withstand tens of kilovolts, however, because the parchment barrier is thick and hardy compared to what is used in your average electrolytic capacitor.


I think that making semiconductors is unfortunately out of the reach of hobbyists. You'd have to grow purified crystals (or buy them), slice and polish them, etc. The various processes needed for lithography involve toxic chemicals too AFAIK. That being said, if you want to make your own large-scale CPU, you can still build one out of discrete 74-series logic, individual transistors, or relays. Takes a lot of dedication, but that is entirely within your reach.

A fun example of a CPU built with discrete SMD transistors, the monster 6502 https://www.youtube.com/watch?v=tQIwS2GzXLI

There's also the MegaProcessor: https://www.youtube.com/watch?v=lNa9bQRPMB8

Zusie relay computer: https://www.youtube.com/watch?v=NXeBR-lbnjI


My curriculum in school involved creating our own integrated circuits on wafers. There are lots of nasty chemicals involved, but it's not out of the reach of a dedicated hobbyist.

The biggest challenge is ion implant, which you can probably outsource to a lab.


Or you can make it in HDL and pay somebody to fab it


So what's the cheapest fab in the world?

Maybe I should just stick with FPGAs.


https://youtu.be/Pt9i2ABe_mE

http://ifdl.jp/make_lsi/

http://hackaday.com/2016/10/13/blinking-an-led-extreme-editi...

http://www.slideshare.net/junichiakita9/intorudction-to-make...

There some projects to realize low-cost, short turn-around-time LSI fabrication at slightly old process, such as 1um, in Japan, whose name is Minimal Fab. This will enable the (commercial) LSI fabrication service at a few hundred USD cost and 1-week TAT. I believe this a revolution similar to that happened in PCB world in ten years ago.


Wikipedia says prototype runs are done MPW or MLM, with many different chips printed on a single wafer. Nobody quotes actual prices, of course, so guess "a lot"

https://en.wikipedia.org/wiki/Multi-project_wafer_service


These do multi-project wafers (aka shuttle runs):

https://www.mosis.com/

http://www.europractice-ic.com/


FPGA conversion has a 50k nre. Anything else and you need a team of people on your end to do things like verify quality.

The fun part is that you can sometimes sneak an trial design into a shuttle service. ( but good luck making that initial design!)


No worries, I heard this guy on an electronics podcast predicting that we'd all have chip printers. It's only a matter of time…right?


Startup idea!


A guy on hackaday.io ygdes IIRC (https://hackaday.io/whygee) does a lot of these, even changing designs (somehow having async memory access at the arch level)

IIUC he worked in the cpu business in the past but is too idealist to enjoy doing it now.


You need some equipment that is not common but it is certainly possible. I got a chance to see some of the transistors that Jeri Ellsworth "baked" in her own fab.

Generally creating metal layers was going to be hard (you need a vacuum chamber to sputter aluminum on the die)

There had been a guy trying to sell most of a 100mm fab line in Santa Cruz at one point, to make chips you needed some pretty nasty chemicals though. Berkeley used to have a fab line they ran for their graduate students (I don't know if they still do or not).

I guess the bottom line is how much effort are you willing to put into the project ? :-)


Well, I have always wanted a vacuum chamber - I think you could also try making your own solar panels if you managed to dope your own silicon. The fun part about that kind of equipment, though, is that you can often get passably-functional DIY models by slapping some off-the-shelf parts together in/around an enclosure. I was thinking of doing that with a thermal cycler, but I wound up finding an old used one for cheap.


A 100 millimetre fab? Now that would be something to see!


Fab lines are indicated by wafer size rather than feature size. Although it is normally in inches starting at 4" and smaller.


It hasn't been in inches for years.

The most common size is 300 mm, next generation will be 450 mm.


could be diameter of the wafers.


Exactly right. 100mm diameter wafers.


I always wonder the same. I don't need 7nm, even 14nm, but having a way to craft just a bunch of chips, with zero cruft (not too much legacy, simple design ala RISC, a bit of GPU inst, crypt), as foundation for something like redox, or hurd .. would be very nice.

ps: these days, on another scale, I look at flexible PCB and even conductive cellulose (<= for the material is 10m from any windows)


Flexible PCBs look pretty cool, for sure - I saw some sheets made of copper-clad Kapton on Amazon, but they were pricey. Still, I think that's what all those TFT ribbon circuits are made of. I once tried soldering little wires to one of those, and I was amazed at how good the tiny gaps between the contacts were at repelling solder and preventing it from bridging.


the dynamics of solder is quite funny, when you look at all the guys soldering chips with pin gap of 0.1mm; solder paste aggregating on metal contacts and leaving the pcb clear all on itself ..


It's totally doable! Although it does take some non-household equipment and chemicals. But much of the equipment you need can be purchased off ebay for relatively cheap.

It's actually a hobby project I'm working on right now, to create some large transistors and simple circuits. My goal is 10um process (aka 1970's technology), but I'd be pretty happy with something a few orders of magnitude higher.

Jeri Ellsworth is the first that I'm aware of having created some large transistors (NMOS process) in her garage and documented the process:

- https://hackaday.com/2010/05/13/transistor-fabrication-so-si...

- http://4hv.org/e107_plugins/forum/forum_viewtopic.php?85399....

And Sam Zeloof very recently did similar:

- https://hackaday.com/2017/02/25/the-fab-lab-next-door-diy-se...

- Lots of other cool stuff on his blog too, like a SEM he restored in his garage, sputtering experiments, etc: http://sam.zeloof.xyz/

As for me, I'm tackling the maskless lithography step first and repurposing a pico projector with modified optics, laser and translation XY stage. More details being blogged actively here: https://hackaday.io/project/25260-makerfoundry

> Would the physics work at that large scale? It could be a cool way to demonstrate the concepts.

Transistors definitely work at the macro scale (see Jeri and Sam's transistors), but they do have some funky properties. Their switching speed is slow, and due to impurities in the process tend to be unstable or have weird thresholds.

Edit: Since folks keep mentioning toxic chemicals, thought I'd list some that are involved. They are unpleasant, but not terribly awful in the grand scheme of chemicals. Mostly just strong acids and bases, but not a whole slew of neurotoxins or anything:

- Piranha solution (sulfuric acid + hydrogen peroxide)

- RCA clean 1 (ammonia hydroxide + hydrogen peroxide)

- RCA clean 2 (hydrochloric acid + hydrogen peroxide)

- Oxide strip (hydrofluoric acid)

- Various photoresist developers (potassium hydroxide, sodium hydroxide, tetramethylammonium hydroxide)

- Wet etchants (similar to developers, KOH, NaOH, etc)

So yeah, some strong acids and bases there, but nothing that isn't handled in undergrad ochem lab courses. The only nasty one in there really is HF, simply because of it's propensity to dissolve bone and not feel the burn until it's seeped in. But Jeri Ellsworth has shown that it's doable to use the dilute HF cleaner you can find in the super market (Rust Remover) which is ~3% iirc, and much less toxic.

When I worked in a wet bio lab, we handled nastier stuff routinely (acrylamide, ethidium bromide, etc) with a lot less caution (gloves, labcoat, goggles, common sense, you're good).


Your mention of SEM made me think of using something like that to "draw" circuits or some similar method that would be horribly slow for mass production. Imagine if you could build a device that took a week or more to make something that's actually better than commercial offerings. It's a stretch, but hobbyists have options that are not available to big companies.


It exists! The technique is called Electron-beam lithography (https://en.wikipedia.org/wiki/Electron-beam_lithography), and it's exactly what you described. It's essentially an electron microscope that is used to etch patterns, instead of doing the whole projection lithography song and dance.

I believe it's used in academic research a fair amount, because it gives very good resolution (sub-10nm) and is very cheap (once you own the equipment). But as you said, it's also very slow :)

There's a contingent of hobbyists that run second-hand electron microscopes in their garage... I'd bet they could do electron-beam litho if they wanted to


On top of polyrfractal:

http://www.easic.com/


Nice, thanks! That's exactly the sort of thing I'm interested in looking into, I'll have to check those resources out.


I recall seeing an article a long time ago where researchers made an OLED display with an inkjet printer. I'm sure the quality was low but it was displaying images. I always thought it would be cool to embrace that technique. Imagine printing signs that light up. I'm not sure what materials need to be used or what the issues are, but I want that.


You have to use hydroflouric acid. No thanks, I'm out

http://blogs.sciencemag.org/pipeline/archives/2004/03/03/thi...


Here is a video walk-through of the process by Jeri Ellsworth: https://www.youtube.com/watch?v=w_znRopGtbE


ps: I just ran into this https://www.youtube.com/watch?v=y0WEx0Gwk1E

enjoy the ride



You can't compare numbers across fabs anymore. Die size is basically marketing at this point.


They seem to have beaten Intel in adopting EUV lithography at least. IBM's 5nm gate-all-around FET (GAAFET) process, which GloFlo should be able have ready for production in 2020, also looks very interesting.

https://www-03.ibm.com/press/us/en/pressrelease/52531.wss


They're only using EUV for a, couple of layers. Intel is using SADP (or SAQP), that should be able to hold its own.


  Die size
Feature size?


Yep. My bad.


Not so far as I know. Intel is suggesting people measure in million transistors per square millimeter, MTr/mm^2.

GloFlo 7nm is at ~17MTr/mm^2

Intel 14nm is at ~37.5MTr/mm^2

Intel 10nm claims to be ~100MTr/mm^2

These are now "14nm class", "10nm class", etc... the number no long really relates to a meaningful feature size, as I understand it.



Thinking about the recent HN link to the article about the toxicity of photoresisters. Would love to know the environmental / workplace toxicity ramifications (or if it’s just business as usual...)


You can look those up easily enough:

http://www.msds.com/


Interesting, I wonder if the reticle limit is smaller on EUV litho machines, that would explain their smaller maximum die size compared to 193i immersion steppers.


Not knowing for sure, I'd wonder if it's limited by EUV power output. The main challenge has always been, how to produce enough light. Whereas with regular litho, your reticle limit is a function of how expensive the lens is.


Definitely, I think this is the issue. You're definitely right that the problem with EUV is how to get a strong enough power source.




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