If you use an FPGA like a CPU, its a waste of the FPGA.
This FPGA will likely be used for implementing the variety of protocols in the embedded world. Imagine that you want to attach a Raspberry Pi camera to an arbitrary Cortex-M4... and the M4 doesn't support the interface.
Instead of bit-banging the interface, you simply program the FPGA to handle that for you, and to trigger an interrupt whenever a full frame of data arrives. The spare CPU cycles are then used for sleep or maybe something else.
This FPGA will likely be used for implementing the variety of protocols in the embedded world. Imagine that you want to attach a Raspberry Pi camera to an arbitrary Cortex-M4... and the M4 doesn't support the interface.
Instead of bit-banging the interface, you simply program the FPGA to handle that for you, and to trigger an interrupt whenever a full frame of data arrives. The spare CPU cycles are then used for sleep or maybe something else.