entity and_entity is
x, y: in std_logic;
result: out std_logic
To me, it's making an always-on connection, such that any electricity on either line "x" or "y" will induce an identical electrical current on "result". This would obviously include any electrical signals, including HIGH/LOW pulses. And they're combined, so HIGH on either "x" or "y" outputs HIGH on "result".
Because of how I read code, I see that as: whatever is in buckets "x" and "y" are combined and copied into bucket "result".
I've never thought of lines, buses, leads, wires, etc as buckets. Yet that's how I think they're described in this code. But if you think about an individual clock cycle frozen in time, some wires have HIGH pulses, and the intention is to copy the HIGH pulse from that wire/bucket.
A really interesting mental-model barrier to watch hardware newbs overcome is to present them with designing a counter - and watching as the very first thing they want to type is a for loop, which is generally not how you'd do it, but almost reflexive to someone who has been programming for a while - particularly in an imperative style.