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that's a really long winded way of saying "SoC with FPGA".





Specifically what it looks like they are pursuing is an SoC built around an FPGA that is optimised for runtime reconfiguration speed and presumably with an ISA extension to request and then later release configurations.

From "Universal AI RISC-V processor does it all — CPU, GPU, DSP, FPGA" (2024) https://www.eenewseurope.com/en/universal-ai-risc-v-processo... :

> For over half a century, general-purpose processors have been built on the Tomasulo algorithm, developed by IBM engineer Robert Tomasulo in 1967. It’s a $500B industry built on specialised CPU, GPU and other chips for different computing tasks. Hardware startup Ubitium has shattered this paradigm with a breakthrough universal RISC-V processor that handles all computing workloads on a single, efficient chip — unlocking simpler, smarter, and more cost-effective devices across industries — while revolutionizing a 57-year-old industry standard.

Tomasulo's algorithm: https://en.wikipedia.org/wiki/Tomasulo%27s_algorithm

Intel, AMD, ARM, X-Silicon’s C-GPU RISC architecture, and Cerebras' on-chip SRAM architecture and are all Tomasulo algorithm OOO Out-of-Order execution processor architectures FWIU




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