It's also sporting a much more advanced ARM core[1], Cortex-M7, compared to most of the other ARM boards which had Cortex-M0(+) cores.
The M7 supports cache unlike the M0(+), and the processor used[2] has 64kB of it, split evenly into instruction and data cache. It also supports branch speculation which the M0(+) does not.
While the Teensy has 4.5x the clock frequency of the Pico 1, the Teensy is 8x faster.
Main outlier is the Pico 2 with a Cortex-M33, though still at a reduced clockspeed compared to the Teensy. From what I can see[3] it does not have cache for its on-board memory, "just" branch speculation like the M7.
If you compare it to the only other board in the table with more than 300 MHz (and the only RISC-V) you can see that Teensy outperforms it by a margin even when the results are scaled by clock speed.
Of course it would only be a complete picture taking power consumption into consideration.
Also the M7 is a superscaler. It's not mentioned often, but if the task allows it, you can use what's essentially 1.5x the execution units of the smaller cores. It's not a complete 2x, but I'm sure it helps.