Hmm. Ok, instead of treating the cache as ram, we will have to treat each CCD as...

bee_rider 88 days ago | parent | context | favorite | on: AMD's Turin: 5th Gen EPYC Launched

Hmm. Ok, instead of treating the cache as ram, we will have to treat each CCD as a node, and treat the chip as a cluster. It will be hard, but you can fit quite a bit in 64MB.