What RISC-V needs to take off, IMO, is laptop/workstation solutions. I believe what has given ARM a huge leg up in terms of development mindpower is Apple's M1. Ideally for RISC-V, there'd be an apple product with it inside. Barring that, you are basically asking for new software for RISC-V to be developed on non-risc-v devices. That can work, but I think it really slows down adoption.
There are a few, but there hasn't really been high enough performance SoCs/cores to make them worthwhile. Framework has a RISC-V based motherboard in the works, but it has less compute power than a Raspberry Pi 4 (JH7110) so it's of marginal use as an everyday machine. I think it will just take time, a lot of time, for RISC-V to get to the same spot that ARM is in now, but I am optimistic that it will get there.
Multiple companies have Apple M1 level RISC-V cores designed and announced and ready for chip makers to license, including Akeana which came out of stealth mode a couple of days ago.
It only remains for someone to design these cores into an SoC, manufacture it, and get it onto boards and into the market, a process that typically in the past has taken around 3-4 years but may be accelerating. Keep an eye out around 2026-2027.
Meanwhile, we'll have early Core i3/i5/i7 level performance in RISC-V SBCs by this time next year (the manufacturer is saying Q1, but I don't quite believe that), but with a lot more cores. That's leapfrogging over Pi 5, Rock 5, Orange Pi 5, which is already a pretty usable machine.
This is what I had hoped horse creek/horse canyone was going to be before it was killed off. The board also needs a stable/updating linux distro like raspberry pi os is along with VS Code and language server support.
Very excited for this but would really appreciate more details. Core frequency, SRAM volumes, CXL generation, PCIE lanes, memory channels... or even ballpark performance estimates.
Has anyone here played with their embedded chips? What was the experience?
This appears to be a press release about core designs (AMBA is an on chip interoperability standard, by Arm), whereas you are asking primarily about SoC features.
Yes, the press release is empty of any content that could be used for a comparison with alternative solutions. Nothing about core area, power consumption per core or any performance metric.
https://www.sifive.com/cores/performance-p870d