Real question about L1 caches. For a long time, x86 (Intel & AMD) L1 caches have... | Hacker News

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throwaway2037 3 months ago | parent | context | favorite | on: Do not taunt happy fun branch predictor (2023)

Real question about L1 caches. For a long time, x86 (Intel & AMD) L1 caches have been pretty much pegged at 32KB. Do you know why they didn't make them larger? My guess: There is a trade-off between economics and performance.

account42 3 months ago [–]

There is a trade-off between cache size and latency.

throwaway2037 3 months ago | [–]

Ok, so why do the new Mx chips from Apple have an L1 cache size greater than 32KB? Did they solve some long standing design issue?

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