Intel is the one trying to catch up to TSMC, not vice versa!
The link you give doesn't have any details of Intel's 18A process, including no indication of it innovating in any way, as opposed to TSMC with their "backside power delivery" which is going to be critical for power-hungry SOTA AI chips.
While you are correct that it is Intel trying to catch TSMC, you are wrong about the origin of backside power delivery. The idea originated at Intel sometime ago, but it would be very ironic if TSMC implements it before Intel...
Intel is not the inventor of backside power, they are the first planning to commercialize it. It's similar to finfets and GAA where Intel or Samsung may be first to commercialize an implementation of those technologies, but the actual conceptual origin and first demonstrations are at universities or research consortiums like IMEC. Example Imec demonstrating backside power in 2019 https://spectrum.ieee.org/buried-power-lines-make-memory-fas... far before powerVia was announced.
OP never said Intel wasn't trying to catch up. As far as backside power delivery, this is literally what Intel has been working on. It is called PowerVia.
Except for backside power. Intel published and had a timeline to ship at least one generation ahead of TSMC. I haven’t been tracking what happened since, but Intel was ahead on this one process improvement. And it’s not a small one, but it doesn’t cancel out their other missteps. Not by half.
This isn't a comparison of shipping processes though, it's just roadmap products. And in fact until this announcement Intel was "ahead" of TSMC on the 2026 roadmap.
[0] https://www.tomshardware.com/tech-industry/manufacturing/int...