On: BeagleV-Ahead RISC-V board

[kramerger]

That is my point exactly.

RISC-V was sold to us as the fully open CPU ecosystem but all it offered was an open design and some reference implementation in Chisel. That is not much different from MIPS which opensourced some CPUs 10-15 years ago.

A lot more is needed for a fully open RISC-V computer.

[panick21_ → kramerger]

Nobody sold RISC-V as a fully open CPU or SOC ecosystem.

It simply allows for open source implementations to exists.

> but all it offered was an open design and some reference implementation in Chisel

You are confused between what RISC-V the foundation and what different people in the ecosystem do. RISC-V was started by Berkley and then they created a foundation. There are NO REFERENCE Implementation! Not in Chisel or anything else. Chisel is simply what Berkley used for some of their initial work.

And it has largely worked. There are lots of high quality open CPUs. This was certainty not the case in the past:

- https://www.openhwgroup.org/

- https://www.chipsalliance.org/

- https://opentitan.org/

There are many more.

> That is not much different from MIPS which opensourced some CPUs 10-15 years ago.

Its very different because you were not allowed to use those MIPS chips or built products with it. The only one that was as open was SPARC 32-bit.

What we don't have is cheap mass produced SoC that are well documented. But that a general problem of the industry not just RISC-V.