This is way too much jargon and not enough background to be useful for someone who isn't already an experienced RF engineer. I've dabbled in basic electronics and I understand maybe 5% of what is being said.
One thing that strikes me is it looks like the test load seems to be just a resistor, and the input is a sine wave. Real practical IC's (especially CPU's) have variable loads that switch at unpredictable times, is a constant resistance and frequency really a good model of that?
Also it says the "DC bias problem" is "a trap for new designers", but instead of explaining what the DC bias problem is and how to solve it, it instead jumps immediately into talking about an experiment with a "bias tee RF+DC", where you have to set the frequency has "to be a decade below the SRF to avoid the effects of the resonance". I don't know what any of those words mean, or under what kind of circumstances I should avoid "class II" ceramic capacitors (whatever class II is).
OP is talking about vector network analyzers, spectrum analyzers and tracking generators. What is that equipment, how does it work, how expensive is it? What does it tell you about capacitor placement that you wouldn't be able to find by, say, setting an ordinary, run-of-the-mill oscilloscope to measure voltage on your microcontroller's power pin, then programming the microcontroller to wake from a deep sleep power state, max out its clock frequency and pump as much current into its GPIO's as the datasheet allows, and checking the voltage doesn't drop below the microcontroller's rated input?
You ask good questions so I'll give very short "answers" to get you started in your search for good explanations.
The tests are frequency sweeps, one frequency at a time over multiple frequencies. Linear models can be decomposed into individual sine waves via Laplace/Fourier transform, so it's valid as long as the model is valid. The input voltage looks like a DC (bias) voltage plus ripple (RF). The frequency response of some capacitors depends strongly on the DC bias (the trap). All capacitors flip to being inductive above the self-resonant frequency (SRF). Good test equipment is expensive, but there are options for hobbyists. A test like that can't predict the response for other inputs and conditions, so you need a model of the dynamics.
That's way too much background information for one article. YouTube is probably your best resource for learning enough to follow along. EEVBlog has a couple of videos on bypass capacitors.
One thing that strikes me is it looks like the test load seems to be just a resistor, and the input is a sine wave. Real practical IC's (especially CPU's) have variable loads that switch at unpredictable times, is a constant resistance and frequency really a good model of that?
Also it says the "DC bias problem" is "a trap for new designers", but instead of explaining what the DC bias problem is and how to solve it, it instead jumps immediately into talking about an experiment with a "bias tee RF+DC", where you have to set the frequency has "to be a decade below the SRF to avoid the effects of the resonance". I don't know what any of those words mean, or under what kind of circumstances I should avoid "class II" ceramic capacitors (whatever class II is).
OP is talking about vector network analyzers, spectrum analyzers and tracking generators. What is that equipment, how does it work, how expensive is it? What does it tell you about capacitor placement that you wouldn't be able to find by, say, setting an ordinary, run-of-the-mill oscilloscope to measure voltage on your microcontroller's power pin, then programming the microcontroller to wake from a deep sleep power state, max out its clock frequency and pump as much current into its GPIO's as the datasheet allows, and checking the voltage doesn't drop below the microcontroller's rated input?