Does the differing prefetch queue size between 8088 and 8086 lead to any significant differences between the Bus Interface Units (or wherever that affects most) of the two chips, or is it basically just a "parameter" in the design that could be tuned without a lot of knock-on effects?
Also:
> If the queue ran empty, the processor waited until more instruction bytes were fetched from memory into the queue.
Does the CPU make any effort to fill up the queue before it runs empty?
I haven't studied the 8088 super-closely. There are a moderate number of changes. For instance, the prefetch registers in the 8088 needs to be updated a byte at a time, so they need separate write control lines for the low and high bytes. The logic that counts queue positions also needs changing; it is optimized logic rather than a generic counter. So it's more than just changing a parameter.
As for the CPU making an effort to fill up the queue, the CPU tries to fill up the queue if the bus is idle. But if memory accesses are happening, you're better off doing the memory accesses that you need rather than performing prefetches which could get discarded.
Also:
> If the queue ran empty, the processor waited until more instruction bytes were fetched from memory into the queue.
Does the CPU make any effort to fill up the queue before it runs empty?