This article may give some reassurance to people worried about RISC-V not having an add with carry instruction; it's not quite as useful as it appears at first sight.
ADC (add with carry) was just fine on the 8080, Z80, 6502, 6800 generation sicne memory was the same speed as CPU and everything executed in a single cycle. I mean, you even had instructions like DAA (Decimal Adjust Accumulator) which were just fine for doing BCD arithmetic.
You only benefit from tricks like these when you get wide dispatch, speculative execution processors.
https://en.wikipedia.org/wiki/Carry-save_adder