For example this one sponsored by Intel where they put an asynchronous instruction length decoder into a Pentium.
https://my.eng.utah.edu/~kstevens/docs/rappid.pdf
They won on latency and power with comparable area. The issue that blocked it was DFT CAD and the ATE infrastructure doesn't exist for asynchronous designs.
For example this one sponsored by Intel where they put an asynchronous instruction length decoder into a Pentium.
https://my.eng.utah.edu/~kstevens/docs/rappid.pdf
They won on latency and power with comparable area. The issue that blocked it was DFT CAD and the ATE infrastructure doesn't exist for asynchronous designs.