Not sure, I'm not read up on RISC-V, but I don't know if someone would want it since AFAIK two's complement means fewer logic gates and a slimmer instruction set.
One's complement arithmetics don't break in the few odd cases like two's complement do though, so there could be that.
One's complement arithmetics don't break in the few odd cases like two's complement do though, so there could be that.