Sounds like a barrel processor [1], used to hide latency of individual instructions to allow code to be written without having to think as much about instruction scheduling / dependencies.
The Xmos chips give the programmer virtual time sliced contexts over one or more hardware core(s). Say you have a 400 Mhz base clock and 4 threads, each one would see the wall clock time advance at 100 Mhz. This is useful for having concurrent realtime operations on each hardware thread w/o having to resort to trickery.
These chips are ideal for DSP, phased arrays and beam forming. Most of their devkits are centered around voice applications.
[1] https://en.wikipedia.org/wiki/Barrel_processor