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You would be surprised, I'm 37 and yet building a PDP-8 on a (large) CPLD, because I'm fascinated with this machine. I even considered building a DTL replica of the straight 8 with PCBs and SMDs for a while, I have some R-series logic gates simulated in LTspice but this proved unpractical to build physically.

I also have both a PiDP-11 with V6 UNIX and an IBM XT replica running ELKS, and I'm currently modeling the EDSAC (1949) in HDL. I find those machines fascinating, and the assembly code that came with them just as fascinating in resource efficiency.



You're my hero, but I hope this evolves into your own SOC design that features a 32-bit variant (no overlays!) with 45 I/O pins, WiFi, BLE and NFC. :)




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