> I'd be curious to see AES encryption performance compared between the same CPUs from Ampere, Intel, and AMD. In my experience, Intel have a significant performance advantage with their AES-NI implementation over AMD. I wonder what Ampere's cores can do.
AMD in Zen1 had 2x AES-pipelines, allowing 2x 128-bit AES operations per clocktick.
Intel caught up later, and eventually also added 2x AES-pipelines of their own. But then AMD added 256-bit AES instructions to Zen3 (which are 128-bit x2 vectorized).
AVX512 does have 4x SIMD AES on AVX512 (4x128 bit wide), for 4x parallel AES computations per clock tick. But that's not on consumer chips. I guess that's the widest AES implementation right now however, but AMD isn't that far behind in Zen3.
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If anything, I'd say AMD actually was beating Intel at the AES-benchmark at Zen1 (In year ~2017 or so), but Intel / AMD have been trading blows with each other since then.
I haven't been able to test any Zen 3 CPUs. Now I'm curious!
From benchmarks listed here: https://calomel.org/aesni_ssl_performance.html
it seems that Intel had similar performance in their 2015 release of the i7-6700 as AMD's 2017 release of Ryzen 7 1800X.
Raw general purpose benchmarks I found via Google put the Ryzen 7 1800X at about twice the compute capability as an i7-6700, but their AES performance is quite even.
Regardless, it does really all come down to what your compute need is, and specialized metrics for somewhat odd-ball cases can sometimes still heavily favor Intel for the money.
Thanks for your comments! I didn't previously fully comprehend how the AVX modes and pipeline widths mattered for AES.
Yeah, this is super-specialized. I just happen to have studied the AES instructions to a ridiculous degree a few years ago... (https://github.com/dragontamer/AESRand)
You don't come up with 32-bytes of random numbers every 4-clock ticks unless you understand this stuff. :-)
AMD in Zen1 had 2x AES-pipelines, allowing 2x 128-bit AES operations per clocktick.
Intel caught up later, and eventually also added 2x AES-pipelines of their own. But then AMD added 256-bit AES instructions to Zen3 (which are 128-bit x2 vectorized).
AVX512 does have 4x SIMD AES on AVX512 (4x128 bit wide), for 4x parallel AES computations per clock tick. But that's not on consumer chips. I guess that's the widest AES implementation right now however, but AMD isn't that far behind in Zen3.
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If anything, I'd say AMD actually was beating Intel at the AES-benchmark at Zen1 (In year ~2017 or so), but Intel / AMD have been trading blows with each other since then.