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I know this a losing battle, but I can't help but pipe up from time to time: that's a disclosure, not a disclaimer.

I'm grateful to everyone putting in the work to make RISC-V happen, open hardware is the only way out of the increasingly grim world of 'secure boots' and the like, which seems hell-bent on making general purpose computing on a trusted platform a thing of the past.




"Secure boot" is a perfectly fine and desirable thing. It makes evil maid attacks more difficult and has many other benefits.

The problem is that the current crop of "secure boot" implementations focuses squarely on the average consumer that wants to delegate trust to the manufacturer, and, at best, only pays lip service to users who want to control their own hardware (see: Pixel devices and the like with closed bootloaders/TrustZone but an escape hatch for the OS) or nothing at worst.

Almost every "secure boot" CPU in modern smartphones and such is already user-control-friendly, it's just that they aren't being shipped that way. They get locked down at the factory. The CPU architecture has little to do with any of this.

If you want an example of what an unlocked secure boot device is, look at the Nvidia Tegra devkits. Those come without the public key fuses blown. You can burn in your own public key and then they will only ever run firmware you signed, forever.

ARM devices without secure boot, or with user-control-assertable secure boot exist. And RISC-V devices locked down at the factory will exist.


Isn't RISC-V just an open standard ISA. The hardware implementation might be closed source. Its still possible to but secure boot features on to an implementation.


Sure. It makes the world I'd like to live in possible, it doesn't guarantee we'll get it.

But foundries will burn whatever chip you have the money to pay for. Having a robust open standard ISA lowers the barriers enough that I'm confident we'll see free-as-in-freedom CPUs and GPUs come out of the project.


Gets on my tits also. It's a disclosure.




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