Is the process of making smaller scales possible redundant or does it depend on new findings in science that no one anticipated?
I'd really like to know if the fab producers repeat some kind of procedure to create smaller chips or if a new prodigy to make breakthrough findings has to be found every other year to adhere to Moore's Law.
Making transistors and connections is a bit like Minecraft: you need blocks to create structures and in this case the blocks are atoms of semiconductors.
It means that, leaving whatever physics considerations aside, the size of structures is limited by the size of the building blocks.
1 nm is about 5 silicon atoms so cannot be physically shrunk much further. I suspect that there are further physics limitations (e.g. you may be an isolation channel to be wide enough to actually isolate by preventing things like tunneling, etc.)
Each additional step requires solving a lot of new engineering problems and usually some new physics too, and it's not a linear process: many techniques are proposed that become cost effective only when previous techniques hit their size limits, and then a lot of research is done and most techniques are never gotten to work at scale and just a few pan out and become the next process.
I'm not expert. I think lithographic processes are very important.
That's why companies like ASML are so critical. The technology to work at these scales and wavelengths is very tricky.
From Wikipedia: "ASML manufactures extreme ultraviolet lithography machines that produce light in the 13.3-13.7 nm wavelength range. A high-energy laser is focused on microscopic droplets of molten tin to produce a plasma, which emits EUV light." (that's UV close to the X-ray range...)
I'd really like to know if the fab producers repeat some kind of procedure to create smaller chips or if a new prodigy to make breakthrough findings has to be found every other year to adhere to Moore's Law.