When you can put more transistors, you have to use them for something. You can either put more cores, but that requires for software to be written in a way to utilize those cores and that's not always easy task or even possible. Or you can use those transistors to make some common operations faster and that potentially will increase performance with little rewrites (or even with no rewrites for libraries).
"This is enough" will be said when we wouldn't be able to put more transistors. I think that it won't happen in the next 10 years, but, of course, it'll happen eventually.
> When you can put more transistors, you have to use them for something.
I mean, it’d honestly be really interesting to know the performance charateristics (TDP et al) of an Intel 8088 if it were shrunk to 14nm and then driven at a modern clock speed. Maybe less is more?
It would've been really bad compared to modern CPUs. Just one example: having no cache, instruction fetches would be slowed down to the speed of RAM, what's worse if that instruction writes/reads memory location then another RAM access would be issued, with high probability of accessing very different location additional timing penalties would occur (row pre-charge, etc.)
Ha, no. It didn't have cache, pipelining, separate bus and instruction subsystems, a wide bus. It would run one instruction every N clock cycles instead of N every 1 clock cycle, and hang on every memory read or write. Multi-byte math would take many instructions. It would be pathetic.
My argument isn't that modern software would run faster on such a CPU; my argument is instead that:
1. the most trivially-true version of the argument: software written for that CPU would run faster on a modern "remastering" of that CPU, than it would run (directly, via a lot of microcode-level emulation; or indirectly, via actual emulation) on a modern CPU. (Yes, some software that's still binary-forward-compatible with modern CPUs—only using generic ISA ops—would be faster on the modern CPU. But I'm talking about the worst, most persnickety edge-case uses of the ISA. The kinds of "requires a whole different model of the world to have the right side-effects" ops that make IBM write emulators for their previous mainframe architectures, rather than just shimming those ops into their new POWER ISAs and doing load-time static recompilation to the new ISA.)
2. smaller transistor size would mean less total power draw per cycle—i.e. it's a rather dim bulb—which means you could overclock the heck out of that CPU.
3. As long as you don't also make the die-size any smaller (but rather just lay out your small transistors with super-long trace-paths between them), then you're not decreasing the thermal surface-area of the die in the process, so you can then attach a modern cooling setup to it to clock it even higher.
4. Or, if you like, you can shrink the die-size and produce a compact 10nm 8088, at which point it'd probably be, say... 1 sq. mm? Smaller than a Cortex-M0+, for sure. That's the point when things are small enough that you can start to do wacky things like covering the entire (uncapped) die surface in a focused laser beam, to cool it by entangling the coherent "negative temperature" photons with the traces' positive-temperature baryons, as an indiscriminate version of an atomic-force microscope's method of ion capture.
But what would you do with that speed? Let’s say you run that 8088 at 10GHz (about a factor 1,000 faster than a fast 8088).
What useful algorithm needs that speed but not more than 1MB memory (that CPU could read and write its entire address space a thousand times a second)?
"This is enough" will be said when we wouldn't be able to put more transistors. I think that it won't happen in the next 10 years, but, of course, it'll happen eventually.