> As far as I know, on modern Intel chips, atomic operations block both the store and load ports, but lets other ops through. I think allocation blocks when the first load/store arrives when the pipeline is in that state.
That's great to know. I suspected that was the case and they had moved from the stall the pipeline approach, but I had never tested it.
That's great to know. I suspected that was the case and they had moved from the stall the pipeline approach, but I had never tested it.