Notable that one of its direct predecessors, the Intel 8080, was reverse-engineered to transistor level:
Can't find it in that article, but IIRC she looked at scans of the silicon to figure out exactly what the chips in a C64 do.
I find it interesting that he used transparent latches at first, then after experiencing random glitches switched to flip-flops. I guess the Z80 designers had control of and deeply understood their timing, something you don't get with a FPGA :)
>"A-Z80 is a conceptual implementation of the venerable Zilog Z80 processor targeted to synthesize and run on a modern FPGA device."
Could someone say what exactly "synthesize" means in this context? Is this loading lookup tables in the FPGA in order to implement the code you wrote in your HDL - Verilog, VHDL, something else?
Verilog and VHDL have extensive support for non-synthesizable code, which are used for verification, simulation, testing, etc - e.g., .
What I didn't see was performance info -- how fast (clock rate) did the CPU run in the various FPGAs? I see the size (# LUTs etc) at https://opencores.org/project/a-z80 but not max CPU clock. Alternately, timing for 4-cycle instructions like 'LD A,B'-- which in the original Z80 took 2 M cycles, 7 T states, 4 MHz execution time = 1.75 uSec.
Just curious. I wouldn't expect anyone go to the expense of doing Z80-class microprocessors at 14nm.