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Does anyone have a good reference on how analog is done on logic processes, specifically the bits that have to interface off the chip, like gpio, lvds, and serdes. I'd much appreciate it.

There's something I once encountered, but can't find the reference to, that suggested a kind of "digital-analog" process whereby voltage levels were replaced by timing measurement (?) due to the limits of feature size in analog design. I'm not in the field so forgive my ignorance.




I don't know about modern chips, but 1970s and 1980s logic chips just used big MOSFETs to drive their outputs. There wasn't any weird timing magic going on.

There are also processes like analog BiCMOS that let you mix bipolar analog circuitry and CMOS on the same chip. I also wrote recently about the 76477 sound chip that combined I2L logic with bipolar analog circuits.


Thanks for pointing out your article about the 76477. Fascinating stuff.

As for my second paragraph about "digital-analog", this reference on VCO-based quantizers [1] is not the one I remember but I think is related. Not that I really understand the intricacies, but it's a way of doing analog at low-voltages and finer geometries.

[1] http://ewh.ieee.org/r5/central_texas/cas_ssc/meetings/2012/1...


I'd be interested as well; even when I was working with digital logic designers they described this process (eg bandgap references and PLLs) as "black magic", and it's very rare in undergrad or even master's courses.




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