ARMv7 works on deferred consistency between cores and memory. So, even if the write itself is "atomic", which should rather be called tear-free, there is no inherent synchronisation of writes and reads to the same memory location.
C11 and C++11 atomics also guarantee ordering depending on the memory model parameter.
Look up Sutter's talk titled "Atomic Weapons" for more detail.
C11 and C++11 atomics also guarantee ordering depending on the memory model parameter.
Look up Sutter's talk titled "Atomic Weapons" for more detail.