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One of them was returned to service after 40 years in the boneyard in Arizona, back in 2011, I would expect they'll look at the other airframes there to see if they're suitable sources for a rebuild. Wouldn't be surprised if this is the end of this one though, it was already doing pretty well for a design that first flew in 1949 (the English Electric Canberra design that was then built by Martin)

Wait, this is THE Canberra? The Mighty Canberra? The RAF Luton Canberra?

This gives those jokes an entire new dimension!


It's snappy, seems to work well


Working in silicon design, Verilog and SystemVerilog are the bulk of the work, but a lot of scripting of EDA tools too. I enjoy it, I think it's very different working on something which has to be complete when you're done versus something that can be updated easily.


It's been succeeded by Lemontron: https://lemontron.com/


Thank you!

The year-in-review design review is worth watching just to see the decision/optimization process. Really nice

https://www.youtube.com/watch?v=FU5CCRJrfcg


Oh wow, I've never actually heard about the Lemontron, I'll definitely take a look at it for inspiration!


Possibly. Realistically this is replacing the expensive category of FPGA (Zynqs or similar with strong hardware CPU cores), this means they get all the peripherals they desire in hardware, and they can pick the core variant in order to optimise for their workloads (all the different vector extensions for example). There's an interesting market for that kind of thing, either full FPGA to ASIC replacement, or drop in replacement FPGAs of lower cost (The Rigol MHO98 replaced the Xilinx FPGA of the previous generation with a substitute from Fudan). If you're shipping a lot of hardware, that sort of thing becomes worthwhile.


Nope, it's replacing Orin.


C, because it makes every problem into a memory management problem, which is good for you in an 'eat your vegetables' sort of way. It's also the starting point for a lot of other programming languages and related things like HDLs, which is helpful to me.

I'm plodding my way through the 2015 challenge here: https://git.thomasballantine.com/thomasballantine/Advent_of_... , it's really sharpened me up on a number of points.


Burning off black spray paint for etch resist worked for me. An extra step but easy enough


I think its another symptom of the problem of there not being a clear way to get from your smart brainbox which you run a proper operating system on and do heavy computation on to driving lots of motors or similar. There are options, but there's not one that everyone defaults to and you can get good information on.


I've seen multiple SoCs from China that integrate a high performance Linux core and a smaller MCU-like RTOS core into the same die. SG2000 being one example.

Pretty clear to me that they're aiming at drones, 3D printers and robots with that.


Not just Chinese companies, Ti has done this forever with their Sitara SoCs. This is the chip in the beaglebone. The chip includes two PRUs which are microcontrollers that run at 200mhz and share memory with the rest of the system.

TIs latest version of it (AM625x) has four A53 cores, one PRU, and a Cortex M4F. It is similar in performance to the Qualcomm chip in my own benchmarks


Feels like everyone is doing that sort of thing these days, it is very common to see Cortex M series core integrated into big SoCs. Quickly checking TI, NXP, and ST all have M4 (or similar) cores integrated to their SoCs


The reason there's no obvious default is probably because of the differing price points and complexity of the products that are being built. e.g., from some of the products that I've worked on.

- UI/database on desktop with multiple real-time processors connected via serial/Ethernet

- UI/db on Linux SoM with embedded processor connected through serial

- UI/db on Linux SoM and the SoM has an embedded ARM processor connected via shared memory

- UI on one core of an ESP32 with real time control on a separate core. This isn't something I've done, but many 3D printers and other low-cost machines are using this architecture right now.


Right — 3D printers, robotics, etc.; some sort of isolation of the microcontroller stage from the monitoring/apps stage.


What we need is a web made in a similar way to the wicker-bodied cars of yesteryear


I wonder what aspect ratio we'll settle on for little corner of our eye viewing on AR gear?


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