Hi, this looks like a strong result. Congratulations!
Short answer: to scale up hardware synthesis, it may be necessary to change the encoding rather than look for a better solver.
More details: I should first say that I have limited experience with synthesizing hardware. My lessons come from [1], where synthesized a small Wallace Tree multiplier. What that taught me is that hardware arithmetic circuits should perhaps not be formulated as a 2QBF problem -- because you might need too many counterexample inputs to terminate the CEGIS loop.
Instead, I believe that the circuit synthesis should use algebraic reasoning (for correctness) and combinatorial reasoning to explore the space of candidate circuits. Since one symbolic input is sufficient to show correctness, the problem simplifies from 2QBF to SAT.
This idea is briefly explained in Sec 4.1 in [3], a project that synthesizes software expressions that look very much like hardware circuits (permutations and such) [2].
I am happy to discuss this in person if it might be helpful to your work. Both Mangpo (the author of [2,3]) and I will be at the conference.
Hi Athanasios, program synthesis has been used to automatically repair introductory programming assignments (a sample of papers is at the end). This technology could make tutors more productive: [1] says that 81% of synthesized repairs were of high quality. This is very impressive but the tutor is still needed to check the quality. Also, synthesis cannot repair all programs (an empty submission cannot be repaired). Finally, this automatic repair allows the tutor to focus on giving guidance, rather than on finding the bug in a programming assignment.
Short answer: to scale up hardware synthesis, it may be necessary to change the encoding rather than look for a better solver.
More details: I should first say that I have limited experience with synthesizing hardware. My lessons come from [1], where synthesized a small Wallace Tree multiplier. What that taught me is that hardware arithmetic circuits should perhaps not be formulated as a 2QBF problem -- because you might need too many counterexample inputs to terminate the CEGIS loop.
Instead, I believe that the circuit synthesis should use algebraic reasoning (for correctness) and combinatorial reasoning to explore the space of candidate circuits. Since one symbolic input is sufficient to show correctness, the problem simplifies from 2QBF to SAT.
This idea is briefly explained in Sec 4.1 in [3], a project that synthesizes software expressions that look very much like hardware circuits (permutations and such) [2].
I am happy to discuss this in person if it might be helpful to your work. Both Mangpo (the author of [2,3]) and I will be at the conference.
[1] https://ieeexplore.ieee.org/document/5227085
[2] https://github.com/mangpo/swizzle-inventor
[3] https://github.com/mangpo/mangpo.github.io/blob/master/paper...,