https://developers.google.com/speed/pagespeed/insights/?url=... score still isn't great, but at least the images aren't the bottleneck anymore. The site is in the process of a grand rebuild that should get rid of the recurring jquery loads, but that's a few months away.
Speaking as someone at Beagle, we see this board as an important step to more openness in the ecosystem, especially helping software developers improve the state of open source for RISC-V. It is also just a really cool board. Beagle will do more to try to get more openness at the RTL-level moving forward, perhaps even with FPGA boards at an interim step. The shuttle services are starting to make releasing a new chip design in reasonably modern nodes more possible.
One of the other replies points to the RISC-V extensions feature. I think for someone who "doesn't care about openness" would at least benefit from that in the architecture. It means the same compiler can be used to bootstrap things and simple steps can be added to greatly optimize specific types of code, like AI stuff. This board really stands out in AI performance.
Also, having things open means that the supply-chain can be more stable, with less chances of a single glitch in the system halting deliveries for any time. This is driving a lot of interest in RISC-V right now.
Faster, newer generation CPU (Zero moved back to ARMv6). Additional microcontrollers (2x PRU, 1x M3). ADC. More I/O capability. Open hardware with a (yet to be proven, but I'm very confident) much higher availability for use in projects, etc.---and also simple to clone/extend if you want to make your own. Also, better processor documentation.
I made priority of choosing pins not used by LCD or eMMC on BeagleBone Black so that many capes not reassigning those pins could be adapted. The pinout was also done to work with a large number of existing breakout boards.
The EEPROM identifier requires a small update to the bootloader and device tree.
