

Ask HN: Will two similar processors process data in the same exact way? - RevRal

Friend and I got into a debate, the simple question: will two computer processors, one finished manufacturing right after the other, compute the same data in the same exact way, down to each transistor?<p>Opinions? Facts?<p>I appreciate the help here.
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zerohp
No, they don't always achieve the same results but there is a lot of
engineering dedicated to correct the errors.

You can find academic papers on the subject of GPGPU soft errors around 5
years ago when people started doing general purpose computation on graphics
processors. GPU's did not dedicate as much logic to error correction because
it doesn't matter as much for real time graphics.

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chrisBob
No, many of the current Intel processors come off of the same fab and are
intended to be identical, but the devices that test worse become the lower
spec versions. A quad core i7 with a core that performs significant'y below
the others becomes a dual core model. When you are making 1.7 _Billion_ of
anything there are going to be some errors, but a CPU is designed to
compensate for this.

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caw
It was my interpretation that "binning" is because of the manufacturing and
imperfections in the etching or underlaying wafer cause certain chips to not
perform up to spec. It's not because there's 1.7 Billion of something, but
rather because you're drawing at 22nm. The way a processor does math is
identical in every single processor, but processor A may result in more heat
discharge or higher voltages required than processor B at the same clock rate.

Where you get into "it may not compute identically" is the revisions. At Intel
at least, going from A0 to B0 means the transistor layout on the wafer
changed. Going from B1 to B2 means the wiring layout changed (though the
underlaying metal layer remained the same). Again that's a "technically",
whether that's followed to a T is something I'm not sure about. Sometimes
features are added going between metal revisions.

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chrisBob
Thanks. It looks like I was wrong. I understood that there was some redundancy
build into chips, but that appears to be false. After some more research I
think you are right that only the voltage/clock rating vary die to die, and
that the transistors must be 100% working.

That means that the answer to the OP's question should be that if the data is
stored in the same memory location then two chips in adjacent server racks
will use the same transistors to do the same math.

~~~
caw
Transistors may not need to be 100% working on 100% of the die to be shipped.
If the fault is contained within a subsection, the manufacturer can set fuses
to disable portions of the chip. This is generally used to distinguish
features between product lines. Processor A could have VT-D failed in
manufacturing, so it's fused off and sold as a cheap processor. Processor B
could be fully working, but Intel needs to sell more cheap processors, so they
intentionally disable VT-D on B. Sony did something similar with shipping
Playstation 3s since they couldn't get the yields high enough initially. They
disabled 1 SPU of each processor since they could reliably get 7 working ones
in manufacturing. Those 8 SPUs are more interchangeable though, they're more
like graphics chips in that regard than general x86 CPUs.

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wmf
Yes, digital logic is generally designed to be as deterministic as possible
since that makes everything easier. There's even a concept called lockstep:
[http://en.wikipedia.org/wiki/Lockstep_(computing)](http://en.wikipedia.org/wiki/Lockstep_\(computing\))

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schmidtc
I don't think this is in the wild yet, but interesting all the same...

[http://www.extremetech.com/computing/151506-self-healing-
sel...](http://www.extremetech.com/computing/151506-self-healing-self-
monitoring-chip-rearranges-circuit-if-damaged)

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ksherlock
A processor can compute differently when it's over clocked.

[http://blogs.msdn.com/b/oldnewthing/archive/2005/04/12/40756...](http://blogs.msdn.com/b/oldnewthing/archive/2005/04/12/407562.aspx)

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kasey_junk
Well you didn't mention what memory bus the processors would be installed
in...

