
Low-Power $5 FPGA Module - unwind
http://www.eetimes.com/author.asp?section_id=216&doc_id=1327108
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kam
The use of the iCE40 family is exciting because there's a fully open source
verilog to bitstream synthesis toolchain for the iCE40HX1K.

[https://github.com/cseed/arachne-pnr](https://github.com/cseed/arachne-pnr)

[http://www.clifford.at/icestorm/](http://www.clifford.at/icestorm/)

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openchip
correct, and we use link to icestorm with permission from our other ice based
project.

icestorm uses HX1K as main target, but porting to iceultra should be not an
issue any more as almost all work is done.

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pjc50
The surge of interest appears to have killed Lattice Semi's website. Anyway,
this is a fancy breakout board for a tiny BGA device: ice40UL1K. Available in
single quantities from Digikey for under $2.

I'm not sure what you'd do with this; at 1k LUTs you could probably just about
fit an 8-bit microprocessor in there. Could you do crypto? You could get one
or two AES implementations in:
[http://www.chesworkshop.org/ches2003/presentations/chodowiec...](http://www.chesworkshop.org/ches2003/presentations/chodowiec_gaj.pdf)

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zombees
I feel like its about time Lattice got some attention. Their development
environment is way nicer for enthusiasts and it's usually pretty easy to use
their stuff in projects. Xilinx by comparison only has free IDE support for
some mid range SOCs (Zynq-7000) which tend to cost a lot on their own and the
IDE is a living nightmare to use.

~~~
vvanders
Yup, I really like lattice's offerings.

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grandalf
can anyone recommend a good FPGA development kit to get started? I'm
ultimately interested in SDR (dsp) and possibly finance applications, and
would like to get familiar with the dev tools as I work on some hobby
projects.

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HappyTypist
Noteworthy limitation [1]:

> The only gotcha is that the FPGA onchip memory is OTP, so it should either
> be loaded by external CPU over SPI, or from external SPI Flash, in both
> cases the SPI pins are user defined IO after bootstrap. Or then fixed
> configuration is burned into OTP.

Basically, while it -may- retail for $5 you will need an external CPU or flash
for it to work. This sounds like a heavily restrictive limitation. I'd rather
pay for a $8 FPGA module with actual persistent memory.

[2]
[https://hackaday.io/project/6592-dipsy](https://hackaday.io/project/6592-dipsy)

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raverbashing
I think you would be surprised to know a lot of the bigger FPGAs work exactly
like that

You usually need a serial flash with the data, or load it on device boot (no
persistent memory)

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tcas
I think almost every FPGA is like that -- I think ones that have internal
flash (like the Spartan-3AN) are still SRAM based and just have a flash chip
in the package as well.

The only flash based programmable logic from Xilinx/Altera are CPLDs as far as
I remember.

External SPI flash is pretty cheap even at low quantity (~$0.50 at qty 1 for
2Mbit, going down to the $0.30 range for low thousands)

~~~
makomk
Yeah, but FPGA dev boards usually have the required Flash chip integrated on
the board rather than requiring you to supply your own.

~~~
raverbashing
Of course. Because it's a dev board

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xt00
With the small limitations of this, it is mostly a novelty--what makes it
interesting is that most FPGA's are much more expensive than $5. So that's
cool. Maybe you could implement a SPI slave to I2C transceiver or something
like that -- something not so easy to do, but useful for a design. And yes,
with only the OTP memory, the external EEPROM makes it more expensive. So at
the end of the day, why not just buy a cheap micro for $0.75 with built-in
flash, multiple blocks to do cool stuff, and if you are dead set on doing some
FPGA type stuff, Cypress Semi has some psoc devices that have built-in logic
blocks that are similar to FPGA macrocells.

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openchip
no need for crystal, 10khz and 48mhz internal oscillator, and I do have some
solution for the OTP use. Its a dowside, but it still amazing pastard. And yes
AVR core fits nicely, I have done, and will port the old code from ice65 to
iceultra. Yes volume pricing is below 1USD, and YES I have done commercial
products with microcontroller with wholesale below 3 usd.. cheers Antti

~~~
mmastrac
What speed can this run the AVR core at?

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openchip
I have done AVR in ICE65 but I do not recall the max clock I was able to
achive. Internal clock is 48MHz, with some speed tweaking I guess a 4 clock-
per instruction AVR core could work. But the beauty is that you can implement
part of the "code" in real hardware.. or add custom instruction, or roll your
own cpu..

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sdrothrock
Not for sale, not available... wonder where this $5 price is coming from?

~~~
thomasrossi
production cost maybe? But yea, I wonder too. Anyways, it would be really nice
for mining strange algorithms, especially if at that "price"

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steckerbrett
No, this is targeted towards consumer, mobile devices. For cryptographic use
you want small process, high bin, typically extremely large and expensive
chips. The thing has integrated LED drivers, it's about as far from what you
want for that application as you can get.

~~~
pjc50
Quite handy for covert data exfiltration by modulating a "power" LED, though.

~~~
Sanddancer
The UART on this speaks IrDA natively, which would be a much more attractive
target for covert exfiltration.

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CCs
Combine it with C.H.I.P. [1] and you have a $14 supercomputer.

The generic CPU could download over the air update (WiFi) and reprogram, take
care of user interface etc while the FPGA can do the low-power, high
throughput tasks (voice processing, video, image etc).

[1] [https://www.kickstarter.com/projects/1598272670/chip-the-
wor...](https://www.kickstarter.com/projects/1598272670/chip-the-worlds-
first-9-computer/description)

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IshKebab
What's the target for a device like this? It doesn't seem powerful enough to
replace a Cortex M4 for example - is it just if you want really really low
power use?

~~~
pi-rat
Tiny fpgas are sometimes used just to add a bit of glue logic next to a MCU.
Or even just as reconfigurable routing for future-proofing a board. I've seen
them as small as 600 logic blocks, which certainly isn't enough to do anything
remotely advanced - but they're getting real cheap these days :)

~~~
dragontamer
I definitely seen them used in that manner... but at only 8 pins (two of which
are probably power), its hard for me to imagine good future-proofing in only
6-pins.

I guess 28-pin CPLDs are already made though (Atmel ATF750C). But I really
don't see how a 6-pin FPGA can be used for routing / future proofing.

~~~
pi-rat
I think the IC itself is 16 pin, but only 6 is broken out on this board (rest
is LEDs/etc). But yeah, good point on the pin count.

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openchip
all IC pins are available, 5 normal I/Os arranged as DIP8, the "LED IO" also
usable as input or opendrain output are in the innner rows where you can
solder 6 pins down, or socket "up", so all 10 I/O are available.

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analog31
Ask HN as an aside: What would be a good platform for learning how to use
FPGA's, that's hobbyist priced? This would be for someone who is already
experienced with electronics, microcontrollers, programming, etc.

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spiritplumber
This looks like a fantastic replacement for a lot of microcontrollers that
handle things like PWM sensors.

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openchip
its maybe not direct replacement of MCU, but more like addon on, customized
peripheral that handles things that are too fast for software, examples could
be: PWM input, i2c PWM controller, barcode emulation controller, nonstandard
interface that need precise timing where software bitbang would eat too much
cpu time.. etc.

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rjsw
A former cow-orker has been selling a Xilinx version of this for years.

~~~
openchip
xilinx in DIP8? Really? smallest coolrunner is qfn32 and that DOES not fit
inside DIP8 footprint with through holes..

and coolrunner is so not cool, really.. I have done it all, :) doing it since
1979

