
Python to Circuits - signa11
https://xesscorp.github.io/skidl/docs/_site/index.html
======
proee
This solves a very specific type of schematic entry where you're connecting
tons of digital buses and I/Os. It's pretty tedious and error prone to do this
in a schematic editor.

If you're ever done a 50-plus page schematic with a lot of digital parts
(FPGAs, micros, etc.), you're stuck using a lot of global port definitions and
these are the source of a lot of schematic input errors.

In the above case, it would actually be easier to see where your net is going
using the python script as opposed to going through a printed schematic or
even a schematic editor.

I know of many schematic types where it would be faster and safer to define
the circuit using a script. After all, this is basically what you're doing
with an HDL language like Verilog.

This is NOT well suited for analog circuits where you need to understand the
circuit topology with lots of discrete components.

------
jimmyswimmy
Ugh, this hurt my brain. I do Analog and mixed signal designs and the thought
of trying to debug a circuit represented as code makes me want to puke. On the
other hand, I really find the schematic capture process to be painful so the
thought of just writing some copy paste code for creating new parts is pretty
appealing. If this thing had some kind of automatic visualization generator it
might be kind of fun. Not sure if I'd ditch altium for it though.

As I went through the doc I started to think how cool it would be to put some
parametric design features straight into my circuit code. So you could set
gain and filter frequencies to be inputs and calculate component values
automatically, creating self documenting circuits. But then I saw what they
did to the multiplication operator. Yuck, that's super unintuitive:

> r2, r3 = 2*r1

That's how you make two copies of whatever r1 is. But intuitively that
statement says, at least to an EE it a circuits guy, that r2 and r3 are
resistors with twice the resistance value of whatever r1 is. That is a real
problem.

Might be nice for fpga layout design. Tying 400 pins to net names by clicking
on each one is tedious and error prone. For everything else I'd really miss
the graphical representation of a schematic.

~~~
Gracana
I wouldn't mind using something like this to define bus connections and such,
then import the netlist into my schematic editor and have it help me draw the
schematic. That would be pretty useful.

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wott
I have been "requesting" such a tool for a long time.

Why? Because most of the circuits designed today are mostly digital, and they
include IC which are very integrated: lots of functions, and often lots of
pins.

So, in the end, you have IC that you cannot represent properly, meaningfully,
on a schematic (they have too many pins and many of them can bear a different
function depending on configuration); and you spend your time connecting buses
or other digital signals... with a non-negligible percentage of error.

What do you use 90% of the time? Straight connections from bus to bus, a few
pull-ups/pull-downs here and there, and a good amount of decoupling
capacitors, of just 1 or 2 different values, between the same pins. A RC
filter on some inputs, a crystal oscillator there. That's almost all, the real
analogue circuits parts are generally small, so even if they are more painful
to write and read compared to a schematic, there will still be an overall gain
in describing the circuit by text.

Being able to do that (writing those elements and links) in some descriptive
language (HDL) would be great. There's a reason why we switched from schematic
to HDLs for FPGA / ASIC design. And this reason become more and more
meaningful for PCB design too. (Also it would make diffs much easier.)

I had written some syntax example for such HDL, but I suck at compilers and
stuff.

I will have a look at this project, even though I fear it won't satisfy me and
won't implement what I want. I generally find languages that are piled upon an
existing one cumbersome, verbose and unfit for the specific purpose .
Especially a descriptive language upon a programming language.

------
spott
I'm a little curious... why?

It is much harder to visualize, I don't think it is appreciably shorter to
write, it isn't necessarily clearer.

I suppose you can do interesting things like parameterizing parts on the value
of other parts, but I'm not sure that is particularly useful.

If this was going to be the underlying core of a graphical netlist generator,
I could see it being useful for that...

So, anyone have any ideas what is the big reason I should use this over KiCAD
or similar?

~~~
wrs
Since your question is about visualization -- the kind of schematic this is
good for looks like this:

[http://papilio.cc/uploads/Papilio/fpga_schematic.png](http://papilio.cc/uploads/Papilio/fpga_schematic.png)
[http://papilio.cc/uploads/Papilio/duofpga_schematic.png](http://papilio.cc/uploads/Papilio/duofpga_schematic.png)

The drawing tool is really just getting in your way.

And you _would_ use this with KiCAD -- this just takes the place of eeschema.

~~~
spott
Those schematics though are just throwing everything into a bus... It isn't
really differentiating signals at all.

What is the difference between just labeling all the FPGA outputs (which is
done here), and then labeling the inputs where they go rather than having the
bus line in between?

Or in other words, is this really the best schematic to be comparing against?

>And you would use this with KiCAD -- this just takes the place of eeschema.

Yes, I misspoke.

~~~
wrs
That's the point -- if the schematic is just connecting pins to buses and
other pins, how is that improved by drawing a rectangle and placing the pins
on its perimeter? It can be clearer as a simple textual netlist, or even
clearer as a simple textual program that generates the netlist.

~~~
spott
I guess my point was more along the lines of: "Is that schematic really a good
schematic, and if not, should it be the goal of a project like this?"

Though I get your point as well.

------
Animats
It's a way to write netlists in Python. As someone who uses both Python and
does PC board design, this seems useless.

If you want to code something useful in that space, write an open source auto-
router. The one for KiCAD no longer works and has IP problems. The author
worked for a company that sold an auto-router, and they're unhappy about open
source competition.

Or work on KiCAD bugs. KiCAD, which comes from CERN, is open source, but
rather buggy. Most of the bugs are UI bugs, which requires good taste in UI to
fix.

~~~
probablybanned
Yeah, instead of writing a small tool to solve your own problem quickly you
ought to spend your time pushing this giant boulder up a hill. Good luck with
that pitch!

------
jonjacky
Pertinent: MyHDL, hardware description and verification language in Python:

[http://www.myhdl.org/](http://www.myhdl.org/)

------
blackguardx
This is an interesting project. It would be cool to integrate with with a
schematic generator. You could then edit the schematic for better logical flow
/ presentation.

------
agumonkey
I knew there was a s-exp like format in the electronics world, but that's the
first time I see it.

[https://en.wikipedia.org/wiki/EDIF#Syntax](https://en.wikipedia.org/wiki/EDIF#Syntax)

~~~
nickpsecurity
DDD and SHard were LISP's for digital:

ftp://www.cs.indiana.edu/pub/techreports/TR456.pdf

[http://scheme2006.cs.uchicago.edu/05-saint-
mleux.pdf](http://scheme2006.cs.uchicago.edu/05-saint-mleux.pdf)

I haven't heard of one for syntax of digital, analog, etc. Quick Google found
an analog simulator that ran on LISP machines. Doubt we'll find much more than
that given analog is basically math functions on real numbers. Better off
using Fortran w/ CSV's if doing old languages. ;)

[http://ieeexplore.ieee.org/document/48261/?reload=true](http://ieeexplore.ieee.org/document/48261/?reload=true)

~~~
agumonkey
Beautiful papers, thanks a ton.

~~~
nickpsecurity
I give you one more if you're a fan of LISP machines. It's using the toolkit
above to derive a Scheme CPU:

[https://pdfs.semanticscholar.org/7ef3/c551b8cb86f3ec0067c941...](https://pdfs.semanticscholar.org/7ef3/c551b8cb86f3ec0067c94147bb4a1b8bd6cb.pdf)

~~~
agumonkey
Thanks another ton.

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madengr
Back in the Stone Age, we used netlists to enter circuit schematics. Then
computers evolved to graphical entry; so much nicer. Looks like it has de-
evolved back to a net list.

------
buserror
I'm not a super experienced hardware guy, altho I do quite a few bits and
bobs, and I always found the graphical entry of schematic... silly.

As a lifelong software developer, entering schematics with little boxes and
lines seems roughly equivalent to try to do serious programming using one of
these languages where you drag&drop boxes around, used to teach beginners.

Having a way to have a description language for schematics makes a lot of
sense; HDL/Verilog exists so you don't have to use the graphical editor for
describing your h264 encoder for example. Likewise, Excel source code isn't
made in a graphical editor either.

Now I'm not sure the python scripting example given on the page show the
potential as it's best as it tries to highlights a bit too much the
'programming' bit; also some sort of 'good practice' would need to evolve;
like grouping parts together, labeling, comments etc.

------
planteen
What part of the hardware design process is this for? Is the idea to kick the
netlist over the wall and let someone else do the schematic capture and
layout? Is there a way to visualize the netlist as a schematic?

I'd say one of the most important parts of a hardware board is having a
schematic handy. And even when reverse engineering, you have the PCB and
redraw a schematic, not dump everything as a netlist.

~~~
andyv133
Agreed. With traditional tools, I do have a netlist and schematic available
for every circuit I work on. I've never reached for the netlist when studying
or debugging, it doesn't convey enough information. Sure the netlist
technically tells you how it is all connected, but a properly done schematic
can give you a deeper understanding of the workings of the device much more
quickly due to its layout and utilization of common symbols (instead of part
numbers, which are often unhelpful).

All that said, I would love to see this kind of thing as a feature built into
a schematic editor.

------
eternauta3k
Doesn't seem very helpful when analyzing/reasoning about a circuit

------
patrickyeon
There's a nugget of a great idea here, the realization that there _has to be_
a better way to describe schematics than drawing them. Unfortunately, most
comments seem to be distracted by the trees of what is started here and are
missing the forest that is the potential. (Aside: ever stuck on a problem or
need to prompt someone else to start talking through a problem, especially in
an interview? Ask "what's the worst solution that could be argued to work
here? How do we improve it?")

So, what would a more exciting example include? How about sensible "default
initializers" so that I don't have to wire up all the power pins, decoupling
caps, pull-ups, pull-downs, and no-connects that 98% of the designs for a
particular chip need?

What if instead of having to draw this: [http://e2e.ti.com/cfs-
file/__key/communityserver-discussions...](http://e2e.ti.com/cfs-
file/__key/communityserver-discussions-components-files/166/2541.Untitled.png)
I could just enter:

    
    
      cpu = msp430(vcc=3v3)
      storage = sdcard(vcc=3v3)
      sd_bus = storage.connect(cpu, I2C_FAST) # let cpu and storage negotiate their pins
      # sd_bus is now a list of nets that make up the connection
      utils.apply_pull_ups(sd_bus, 50K)
    

That's all very possible, computationally, but so much less tedious than
drawing it out and so much more descriptive of what I'm actually trying to
achieve. As a bonus, it has properties programmers forget so many other
people's tools don't: it's good for line-based diff, search/replace, and
source control.

Another example: Most of what's going on here:
[http://www.mikrocontroller.net/attachment/162013/freqgen.png](http://www.mikrocontroller.net/attachment/162013/freqgen.png)
is defaults (it's also, and I wish I could say this nicely, in my opinion a
very poorly drawn schematic). Instead:

    
    
      loop_filter = utils.third_order_bandpass(freq_min, freq_max, RC_ONLY)
      freqgen = adf4350(vcc=3v3, cp_filter=loop_filter) # boom, all sensible defaults
      for pin, color in zip(freqgen[LD, CE, LE], ('green', 'red', 'yellow')):
          pin.net.connect(status_led(color=color, brightness=30mcd))
          # let the computer work out your resistor value
      freqgen[RFOUT_A].connect(BNC(50Ohm, SINGLE_ENDED))
      freqgen[RFOUT_B].connect(BNC(50Ohm, SINGLE_ENDED))
      # let the computer work out that it terminates the complementary output
    

The linked project isn't nearly at this point, but I consider it in the same
spirit. We have to go through the awkward solutions while we iterate towards a
great one, I would say.

~~~
TFortunato
On this note, as an embedded systems guy, I was happy to see STMicro thinking
about tools like this, with the STCubeMX software they've been developing:
[http://www.st.com/en/development-
tools/stm32cubemx.html](http://www.st.com/en/development-
tools/stm32cubemx.html)

One of the pains about larger embedded designs, is that while newer
processors/microcontrollers have so many different peripherals and ways to use
them, there are just as many constraints about which functions can go to which
pins, how each peripheral is clocked, etc..

Their tool is similar to what you mentioned, in that you tell it what
peripherals you want to use, and how, if you have any pins you need to lock
down, etc. It will then solve these constraints and give you a pinout and
clock setup that will work, along with boilerplate code to get you started.

I would love to see an open-source effort in this space...basically a
parametric framework / boilerplate generation for embedded systems designs
(hardware and software).

