
About the ZipCPU - peter_d_sherman
http://zipcpu.com/about/zipcpu.html
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RossBencina
In addition to the ZipCPU itself, the zipcpu.com website has many useful blog
posts for the beginning FPGA developer. I've found it to be a great resource.
Mr Gisselquist (a.k.a. ZipCPU) is an active contributor to a number of FPGA
forums and, in my experience, is always helpful to newcomers.

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crazygringo
I'm curious, is there any commercial application for running Linux on a CPU
implemented in FPGA, as opposed to any (presumably cheaper and faster) normal
CPU? Some kind of custom modification this would allow you to make?

I've always thought of FPGA's as being for custom parallel computationally
intensive tasks that run side-by-side with a normal CPU. So just curious if
ZipCPU is just for fun, or something more?

(Or is there even something security-related about being able to verify not
just the code, but the CPU it runs on, in this case?)

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monocasa
Sure, it happens all the time if you want a full os on a core that's tightly
integrated with some custom hardware, but you don't want an ASIC (for
reconfigurability, or just low volumes).

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skybrian
I'm not a hardware engineer, but my understanding is that some FPGAs include
an entire cpu core as part of the chip? This seems much more efficient than
designing your own.

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jtregunna
It's almost always more efficient to use an existing CPU if it fits your use
case than to design your own. Even if it doesn't, it is often more efficient
(time wise) to adapt your use case to the hardware you have available, or
write software to resolve the feature you want in hardware but don't have.
Only the especially nutty build their own CPUs (I'm especially nutty too)

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monocasa
Even if you're not designing your own, dropping a little Microblaze or NIOS
down can simplify your design considerably.

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jtregunna
Oh I know it can, my comment was more tongue in cheek not dismissive :)

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MaxBarraclough
Strange that there's no mention at all of RISC-V. RISC-V also runs on FPGA,
right?

Does it really justify yet another RISC instruction-set?

Impressed that there's apparently already a GCC backend though.

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rwmj
The project was started in Sept 2016 which was also the same month that I was
first porting Fedora to RISC-V. Given the momentum behind RISC-V and also the
huge amount of software now available it would obviously make sense to use a
RISC-V compatible design. However hobbyists can do what they want, there's no
reason to force someone who wants to design their own CPU to do it in any
particular way.

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zipcpu
I actually started the project almost a year earlier, and made _many_ mistakes
before finally presenting at ORCONF in September of 2016.

That said, I am considering a RISC-V compatible design. I just haven't
committed to doing so.

