
The Alpha AXP, part 1: Initial plunge - ingve
https://blogs.msdn.microsoft.com/oldnewthing/20170807-00/?p=96766
======
Someone
_" But it goes further than that: If you specify zero as the destination
register for an instruction, the entire instruction may be optimized out by
the processor"_

What's the logic for adding logic to the CPU for doing that? It may make such
code run faster, but if programmers want faster code, they can just leave out
such instructions.

~~~
rbanffy
IIRC, the instruction has a bit field to specify a register as a destination.
If you specify a register that is hardwired to have the value zero, the
instruction is, effectively, a NOP.

~~~
Someone
Not _is_, but. _may_be_. At least that's what I read.

My question is why would they spend effort (and it is an effort; they would
have to add logic to not set carry/overflow/zero flags when writing results to
that register, for example) making that a no-op if no sane programmer would
use them?

~~~
rbanffy
Sorry. I was thinking about stores. Other instructions may cause side effects
that could be hard to avoid.

It's fine to keep some behaviors of the ISA undefined. Different
implementations may act differently. One generation may really avoid any side
effects by retiring the instruction during the decoding stage while a simpler,
say, low-power implementation may leave some side-effects (a carry that was
set during an addition while the result is ignored). Stating that it _may_ be
ignored keeps the implementations free to do whatever is more convenient.

