
Apple A6 Teardown - protomyth
http://www.ifixit.com/Teardown/Apple-A6-Teardown/10528/1
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mtgx
A5 was manufacturered at 45 nm for the iPhone 4S, and had a 70 sq mm size.

A6 was manufactured at 32 nm, so 30% improvement, and the chip is also 97 sq
mm. So another 40% improvement.

Let's say the new architecture brings say 40% IPC improvement for the CPU
cores, like A15 cores do over A9 (could be less, could be more).

Then the new cores are also clocked at 1.2 Ghz (according to Anandtech's
tests, ifixit doesn't seem to check this, just goes by the rumors), that's
another 50% improvement over the old CPU cores.

The last 2 improvements alone could make the CPU's speed 2x over the iPhone
4S's CPU, while the first 2 types of improvements could've been used to
introduce a larger GPU (3 cores) and at a higher frequency (thanks to die
shrinkage).

~~~
ajross
> Let's say the new architecture brings say 40% IPC improvement

"Let's say" ? Surely this is something that can be trivially measured just by
running a benchmark. Has one been done? Note that 40% seems pretty optimistic,
considering similar bumps in transistor counts in the Intel world generally
get about a 10% benefit (you can do better by adding more cores, of course,
but squeezing instructions through a pipeline with transistor logic alone is
really hard).

Also: your analysis is off. Transistor count scales linearly with die area,
but as the square of node size (not quite, as the transistor layout changes
between processes, but it's still a linear, not areal metric).

~~~
s_henry_paulson
The benchmarks of the processor performance show that it's twice as fast as
the A5.

About 1/4 of that can be attributed to the clock frequency.

There's really nothing left but the IPC to attribute the remaining (~75%) gain
in performance.

~~~
mtgx
It's not 1/4. More like 50% of the increase in performance. The A6 CPU is 1.2
Ghz compared to the 800 Mhz CPU in iPhone 4S (both dual core). And as others
have mentioned, you can't really base that on Sunspider alone. Sunspider is
not a hardware-only benchmark. You need the DMIPS number, which is what ARM is
using for its own chips, too.

So if the increase from clock speed alone is 50%, that means a 1.5x
multiplier, which means the "other" IPC multiplier is somewhere between
1.3x-1.4x (to get 2x over iPhone 4S), which would be on par with Krait and
Cortex A15.

Also, when comparing processors running Android vs processors running iOS,
it's also important to take note not only of the difference in OS, but also in
browsers (related to the browser tests I've seen so far).

~~~
ajross
You're forgetting the ~15% improvement from pure software in the iOS 6
Javascript interpreter mentioned elsewhere. Combining those, I get
2/((2150/1864)*(1200/800))== 1.156. So a 16% improvement in IPC. That's much
more in line with what we see elsewhere in the industry for this sort of
increase in transistor count (c.f. Nehalem to Sandy Bridge, etc...)

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Zenst
If anything I thing this article is of more interest in explaining how they
actualy do these type of teardowns and some nice pictures of some very geek-
sexy looking equipment they use as well.

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tcas
Does anyone know what the two horseshoe looking things are in the bottom left
of the RTR8600 die? I want to say inductors, but they aren't in the shapes I'm
familiar with (that being said, my VLSI knowledge is extremely rusty)

~~~
sparky
Yep, the horseshoe inductor is a degenerate (single-loop) case of the spiral
inductor.

~~~
Osiris
Thanks! That clears things right up (</sarcasm> I have no idea what at least
three of those things are).

~~~
sparky
Sorry, wasn't trying to be obtuse, just concise.

* An inductor is a primitive circuit element, like a resistor or capacitor. An ideal inductor maintains the relationship _V = L x dI/dt_ , where _V_ is the voltage across the 2 terminals of the inductor, _I_ is the current through the inductor, and _L_ is the inductance.

* The simplest inductor is a coil of wire. You've probably seen ones that look like this ( <http://www.electronicplus.com/images/products/387268.jpg> ) on motherboards, power supplies, etc. Inductors are used in power supplies all the time, but also in clocking-related circuits, filters, and other components used in RF devices like the chip referenced in the article.

* In the context of a planar CMOS chip, you can't really build a 3D torus like that, so you build a 2D spiral that approximates a coil ( [http://bmf.ece.queensu.ca/mediawiki/index.php/Spiral_Inducto...](http://bmf.ece.queensu.ca/mediawiki/index.php/Spiral_Inductor_Design) ). That's called a spiral inductor.

* The horseshoe inductor is just a spiral inductor that only has one loop, and is consequently shaped like a horseshoe. Designers vary the size, spacing, number, and geometry of loops depending on the inductance, parasitic resistance/capacitance, material properties, etc.

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rryyan
_"Even though the A6 was manufactured by Samsung, that doesn't mean it was
designed by Samsung. The Apple A6 processor is Apple's first custom-designed
processor."_

Presumably there is some strain in relations between Apple and Samsung, given
that they compete in the mobile device market, and the lawsuit over copying
designs.

Would Apple be worried that Samsung would be able to glean trade secrets from
their custom design of the A6? Would the information provided to Samsung for
manufacture of the chip pose this kind of risk? Or would be less like handing
off source code, and more like handing off a compiled binary?

~~~
tobylane
I would hope Chinese firewalls, professionalism and the contracts stop that
happening.

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protomyth
"it looks like the ARM core blocks were laid out manually—as in, by hand"

~~~
freehunter
Does anyone know why a chip put in by hand will be faster than a chip put in
mechanically (or whatever other means they could use)?

~~~
DigitalJack
It won't always be faster. In fact, I'd argue if you had to lay out the whole
thing by hand you would almost certainly do a worse job than "automatic"
place&route.

It's a matter of distance between components on the die, and transistor
sizing. At the scale of complex integrated circuits, it's just about
guaranteed that an automatic route will do a good job, but stands a good
chance of messing a few hotspots up.

I'm not an expert on the algorithms used for automatic routing, but there is
some random guessing involved. You can even provide a seed for the random
number generator.

More often than not, a hybrid approach is used where the designer gives broad
recommendations on where to place components and lets the autorouter go from
there.

Then at the end, the designer may go in and tweak some hot spots, or scrap it
and start over with a new seed.

~~~
X-Istence
Automatic routing is still an NP complete problem, as in there is no perfect
solution. This is the same issue with automatic routers for PCB's and the
like, it is guess work along with some genetic sort of algorithm that steps
through various options.

I've had times where the auto router for a board gave up because it couldn't
complete the routing, ripped everything up and did it by hand. Sure it took
longer but the routes were shorter, and I finished routing the board with room
to spare.

