
What's a CPU to do when it has nothing to do? - reddotX
https://lwn.net/SubscriberLink/767630/594421f913c3d00a/
======
IcePic
I have no idea on how many other OSes do this, but at least OpenBSD will use
idle time to pre-clear memory pages that have been returned to the OS, so that
when the next process has them mapped, it doesn't have to zero-fill-on-demand
at the very latest moment. It has to be done at some point, but if you keep a
queue of pages needing to be cleared and dealing with as many as you can while
any core is idle, a non-100% busy system can be seen as to "improve"
performance a bit by timeshifting the task to not-directly-after-former
process but also not when the new process is calling for memory to be mapped
in.

But when that list is empty, doing the right kind of CPU sleep is totally
worthwhile of course.

~~~
masklinn
I expect most BSDs do this.

Dragonfly actually _removed_ it two years ago:
[http://lists.dragonflybsd.org/pipermail/commits/2016-August/...](http://lists.dragonflybsd.org/pipermail/commits/2016-August/624202.html)

    
    
      - Pre-zeroing a page only takes 80ns on a modern cpu.  vm_fault overhead
        in general is ~at least 1 microscond.
      - Pre-zeroing a page leads to a cold-cache case on-use, forcing the fault
        source (e.g. a userland program) to actually get the data from main
        memory in its likely immediate use of the faulted page, reducing
        performance.
      - Zeroing the page at fault-time is actually more optimal because it does
        not require any reading of dynamic ram and leaves the cache hot.
      - Multiple synth and build tests show that active idle-time zeroing of
        pages actually reduces performance somewhat and incidental allocations
        of already-zerod pages (from page-table tear-downs) do not affect
        performance in any meaningful way.

~~~
bluGill
I expect openBSD to continue to do this anyway though because there is the
possibility that someone can reboot the system to a new OS (presumably
designed just for this purpose) and read whatever was in RAM. Of course
programs that deal with encryption zero memory before returning it (It is hard
to make sure the compiler doesn't optimize this otherwise useless work out),
but most other programs that deal with secrets are not so well written and
will live sensitive information around.

~~~
sigstoat
> the possibility that someone can reboot the system to a new OS and read
> whatever was in RAM

or physically pull the RAM out, keeping it cold with LN2, and stick it into
devices designed for reading it all out.

~~~
hultner
Canned air upside down works reasonably well and is easier to handle

------
AstroJetson
This is when I miss the days of big iron. The Burroughs B5500, 6500 and 6700
all had massive light displays of registers. The idle process loaded the
registers with a bit pattern that showed the Burroughs logo, a circle with a B
in it. You could watch the panel and see how busy the system was by how often
you could see the logo flash in the lights.

~~~
karambahh
Your comment got me curious: apparently Linux controls LEDs activity through
/sys/class/led [0]

A cursory search led me to this project[1] that blinks the power led according
to the disk activity, which is not far from your idea (replacing the disk
activity by a composite of system load for instance?)

[0][https://www.kernel.org/doc/Documentation/leds/leds-
class.txt](https://www.kernel.org/doc/Documentation/leds/leds-class.txt)
[1][https://github.com/fabio-d/block-led-
trigger](https://github.com/fabio-d/block-led-trigger)

~~~
Sharlin
Isn’t there already a disk activity led? Well, on desktop boxes anyway.

Eons ago I had a small program on Linux that blinked the otherwise-almost-
useless scroll/numlock leds based on network i/o activity. It was fairly cool.

~~~
kungtotte
Reminds me of the book Cryptonomicon by Neal Stephenson, where the character
writes some code to redirect stdout to blink the num/scroll/capslock status
LEDs in Morse code.

------
samcheng
This is really impactful work. Data centers are 2% of US electricity
consumption, and a 20% improvement in idle energy usage will cut that by a
sizable fraction. (Even if virtualization is intended to reduce idle hardware
capacity.)

~~~
deepsun
Well, if your goal is to reduce electricity consumption, the proper way would
be to increase prices for it. It's just there might be easier and faster ways,
not only improving idle CPU states.

~~~
laumars
I hate that approach so much. By increasing prices you're not reducing demand,
you're just making it less affordable for people who might need it equally
than those who are in better paid jobs etc.

I prefer the approach of improving energy efficiency (short to mid term time
scale) and investing in greener energy sources (mid to long term) to bide us
time until nuclear fusion becomes viable and thus electricity consumption no
longer becomes a harmful process.

We shouldn't punish people less fortunate than ourselves for our own gluttony
- which is all that raising prices would do.

~~~
fnord123
>I prefer the approach of improving energy efficiency (short to mid term time
scale) and investing in greener energy sources (mid to long term) to bide us
time until nuclear fusion becomes viable and thus electricity consumption no
longer becomes a harmful process.

Raising efficiency probably won't help at all due to Jevon's paradox:
[https://en.wikipedia.org/wiki/Jevons_paradox](https://en.wikipedia.org/wiki/Jevons_paradox)

"""

In economics, the Jevons paradox (/ˈdʒɛvənz/; sometimes Jevons effect) occurs
when technological progress increases the efficiency with which a resource is
used (reducing the amount necessary for any one use), but the rate of
consumption of that resource rises due to increasing demand.[1] The Jevons
paradox is perhaps the most widely known paradox in environmental
economics.[2] However, governments and environmentalists generally assume that
efficiency gains will lower resource consumption, ignoring the possibility of
the paradox arising.[3]

In 1865, the English economist William Stanley Jevons observed that
technological improvements that increased the efficiency of coal-use led to
the increased consumption of coal in a wide range of industries. He argued
that, contrary to common intuition, technological progress could not be relied
upon to reduce fuel consumption.

"""

~~~
gmac
The Jevons Paradox is an extreme form of the rebound effect[0]. More normally,
we expect efficiency gains to be only partly offset by changes in behaviour.

As an anecdotal example, we replaced one 60w incandescent bulb in our bathroom
with 4 x 5w LED spotlight bulbs. This is both an increase in light, and a
reduction in energy usage, even though it doesn't reflect the full efficiency
gains of the LEDs.

[https://en.wikipedia.org/wiki/Rebound_effect_(conservation)](https://en.wikipedia.org/wiki/Rebound_effect_\(conservation\))

~~~
fnord123
It doesnt have to be behaviour of the consumer. It can mean that the value
proposition of application development can move to more less-efficient
programs. e.g. we have more and more memory in computers so developers often
say "meh, memory is cheap" when developing Electron apps that take hundreds of
GB. This can definitely result in "meh, CPUs are efficient" (even if it's a
non-sequitor in this case).

~~~
laumars
Fair point. We've definitely seen that trend happen where software will often
be written to take advantage of the resources available rather than written to
be efficient. Not just in recent times with Electron but throughout the
evolution of GUI-driven operating systems (eg compositing desktops, themeing,
pre-compositing animations, etc).

The gaming industry demonstrates this the most clearly but it's definitely
present in general purpose computing as well. eg when Windows XP was first
released (pre-service packs) it required twice the hardware specifications of
Windows 2000 yet offered little functional difference (read: actual real world
stuff that could be done on it) aside themeing.

Thankfully that trend with Windows has reversed somewhat but it's still ever-
present with desktop software and their movement towards using web-based
technologies.

~~~
scrollaway
> _The gaming industry demonstrates this the most clearly_

I think the gaming industry actually also demonstrates _the opposite_ the most
clearly.

I'm often blown away by how efficient some games are, and how well they take
advantage of advances in hardware.

I look at something like World of Warcraft, a 14 year old game that has
trouble running on my desktop computer despite its graphics being... _limited_
to say the least. And then I look at Breath of the Wild. A patently stunning
game.

And then I remember which one of the two is a mobile game.

------
Dunedan
Now we just need to iron out bugs which prevent CPU's to reach certain low-
power states. Turns out in modern CPU's that's surprisingly difficult to
achieve, as not only the CPU is considered for such power states, but attached
components, like the NVMe controller, as well. Matthew Garrett explains pretty
good what's happening there:
[https://mjg59.dreamwidth.org/41713.html](https://mjg59.dreamwidth.org/41713.html)

------
samat
This reminds me of what apple did with scheduler in macOS Mavericks
[https://www.apple.com/media/us/osx/2013/docs/OSX_Power_Effic...](https://www.apple.com/media/us/osx/2013/docs/OSX_Power_Efficiency_Technology_Overview.pdf)

------
kahlonel
I once increased coin-cell run-time of a client’s hardware (ARM) platform from
1 month to 1.5 years simply by replacing almost all sleep() functions with
low-power-mode-enter.

~~~
ddalex
I'd argue that, in this context, sleep() itself is buggy

~~~
kahlonel
That was a no-OS situation. sleep() is usually implemented as a calculated
number of cycles of `nop`s in those SDKs.

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aportnoy
Why does a CPU _have_ to run?

EDIT:

> If the hardware doesn't make allowance for this, then the CPU will have to
> run useless instructions until it is needed for real work.

Do any consumer processors (think Intel iBlah) not support turning off the CPU
when it's not needed?

~~~
zaarn
Some cheap microprocessors do that, usually in devices where power consumption
matters they have a small companion microprocessor (a micromicroprocessor so
to speak) that will power down the big one if necessary and enter a sleep
state itself to severely cut down on power consumption (some devices can go as
low as microamps).

Generally, most modern CPUs support turning off when not needed, however, this
is generally referred to as power-on-standby (S3, IIRC). The CPU is off, most
things are off, RAM is on.

The CPU itself has to continue to run because there is almost no timeperiod
larger than a few seconds in which there is truly nothing to do and shutting
down CPU cores and clocking the remaining one is efficient enough.

~~~
tomfanning
A good example of this: [http://www.home-automation-community.com/arduino-low-
power-h...](http://www.home-automation-community.com/arduino-low-power-how-to-
run-atmega328p-for-a-year-on-coin-cell-battery/)

~~~
Already__Taken
Another good example are the javascript microcontroller boards. Because of the
event-loop model of the Js engine, they can simply see there's no code to run
and shift into power saving modes without the dev having to do anything
special.

example:
[https://www.espruino.com/Power+Consumption](https://www.espruino.com/Power+Consumption)

~~~
brokenmachine
That's great, I didn't realize there were micros that could do that
automatically. Much simpler than the usual mucking around with registers.

------
bogomipz
The article states makes numerous mentions of the "the governor":

>"In this loop, the CPU scheduler notices that a CPU is idle because it has no
work for the CPU to do. The scheduler then calls the governor, which does its
best to predict the appropriate idle state to enter. There are currently two
governors in the kernel, called "menu" and "ladder". They are used in
different cases, but they both try to do roughly the same thing: keep track of
system state when a CPU idles and how long it ended up idling for."

Could someone say exactly what "the governor" is? Its a code path in the
scheduler? It wasn't clear to me from reading the article.

~~~
mjg59
The kernel subsystem that handles this is called cpuidle:
[https://lwn.net/Articles/384146/](https://lwn.net/Articles/384146/) . It has
two different governors, ladder (which chooses an idle state adjacent to the
existing state) and menu (which can choose any idle state)

~~~
bogomipz
Thanks this is really helpful. Cheers.

------
malydok
I appreciate the article being written in a language a person without much CPU
knowledge, like myself, can understand. Fascinating.

------
vagab0nd
This reminds me of a story I read from some operating system book: Guys
working on an early OS profiled the system and found that one particular
routine is taking a lot of CPU time. They worked hard optimizing it but found
it didn't improve the overall performance at all. Turned out that routine was
the idle loop of the OS.

I don't remember if it was a true story or just a joke.

------
PhasmaFelis
> _Idle states are not free to enter or exit. Entry and exit both require some
> time, and moreover power consumption briefly rises slightly above normal for
> the current state on entry to idle and above normal for the destination
> state on exit from idle. Although increasingly deep idle states consume
> decreasing amounts of power, they have increasingly large costs to enter and
> exit._

What causes this? I would have thought that "stop computing for a bit" would
be a simple thing to do, but I clearly don't know much about processor design.

~~~
scriptdevil
I work in CPU design. It all comes down to saving power given how frequent
idle-state entries are (especially C1 enters with almost most wait-for-
interrupt operations) Stop-computing isn't well defined. As long as the clock
ticks, the frontend will keep fetching instructions. Sure you can keep feeding
it NOPs, but instead, we save power by entering idle states.

The quickest to enter and exit (C1) simply clock-gates the core. Caches are
preserved. The next c-state might turn off caches too (and thus incurs the
penalty of flushing caches on entry and starting with a cold cache on c-state
exit). Further C-states might require even more work to enter and exit but
consume much lesser power when in that state.

The cpuidle governor decides which C-state to enter since a deep C-state entry
and exit may end up consuming even more power than keeping the system running
or in C1.

------
wyldfire
> but ARM CPUs, for example, will also benefit.

IIRC the majority of phones out there use tickless config, so the ARM CPUs
that benefit here are the server-class ones. But good show, indeed!

------
retSava
An interesting thing regarding the NOP (no operation) instruction many CPUs
have, is that it many times is implemented as a pseudo-instruction. Ie, what
actually runs is something that has no effect, eg move contents from a
register onto the same register.

It has also given name to the human activity of "NOPping", similar to zoning
out.

------
userbinator
Note that this seems to be about not waking up the CPU (by timer ticks) more
frequently, to allow it to go into a deeper sleep --- AFAIK the actual "idle
loop" just executes the HLT instruction, which puts the CPU in a "wait for
interrupt" state, and for newer CPUs they go into successively lower power
states the longer they're halted.

This reminds me that earlier operating systems like DOS and Win9x kept the CPU
in a busy polling loop when idle --- which was great for responsiveness, but
not power consumption nor heat; applications like
[http://www.benchtest.com/rain.html](http://www.benchtest.com/rain.html) soon
appeared, which replaced the idle loop with an actual HLT loop and actually
had a noticeable effect. The DOS version is at
[https://maribu.home.xs4all.nl/zeurkous/download/mirror/dosid...](https://maribu.home.xs4all.nl/zeurkous/download/mirror/dosidle.html)

~~~
mjg59
It's more complicated than that these days. Rather than HLT, you call MWAIT
with an argument that corresponds to the C state that you want to enter - the
OS has a better idea than the CPU of how long it's going to be asleep
(basically what this article is about), so it can tell the CPU to enter a
deeper state. The CPU may make an executive decision based on its own needs to
enter a different state (potentially even a deeper one), but it's largely
still up to the OS to choose rather than the CPU entering progressively deeper
states.

------
e3b0c
Does it also imply that a non-blocking event loop in the userspace application
is energy-inefficient?

Likewise, given that some OSes APIs (syscalls) provide both non-blocking and
blocking modes, should we prefer the blocking ones concerning energy
efficiency?

~~~
imtringued
They are pretty much equivalent. The kernel will only schedule your program
when an event happens. The difference is that by using a blocking syscall you
will need more threads which indirectly decreases energy efficiency through
increased context switching and RAM usage. If you only have a single thread
then blocking or non-blocking is going to consume the same amount of energy.

------
vectorEQ
20% is much win, very interesting and nice progress on the kernel there! very
useful!

------
cobbzilla
How does this work on a single-CPU system? Wouldn’t the various idle checks
and governor calls keep the CPU always busy? Or is there some way to turn off
something so these instructions don’t mark the CPU as “active”?

~~~
fermienrico
FreeRTOS or most RTOS use idle time to go into low power or sleep mode. It
makes sense in an embedded system which is often powered on batteries.

------
leed25d
Blinken dem lights.

------
guico
Hangs out on reddit?

------
jhabdas
>> What's a CPU to do when it has nothing to do? > Mine Bitcoin!

This would be great for CryptoNote Webminers running WASM in the browser to
help users understand you don't have to juice every thread/cpu in order to
effectively mine at scale using a proxy like the one provided in Webminerpool.

~~~
TheDong
> effectively mine at scale

You mean "in order to spend an extra $2 in power to make 3c for someone else"?
Very effective.

As long as there are more price-efficient mining pools which are an
appreciable fraction of mining power, it will not be cost effective to mine
anywhere less efficient since margins will naturally approach what those
larger pools can support.

A consumer desktop will never be able to compete with a centrally cooled data-
centre which likely gets special power rates and was intentionally built in a
location power is cheaper in. Especially not if it's having to go through
wasm.

