
Esperanto Technologies to develop energy-efficient chips on RISC-V - deepnotderp
http://www.embedded-computing.com/news/esperanto-technologies-to-develop-energy-efficient-ai-chips-on-risc-v-architecture
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Koshkin
"Unstealths": announces that it plans to develop...

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dang
Right, this seems to be an announcement of a possible forthcoming
announcement. A more substantive story would be a better fit.

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jackyinger
The thing is that it doesn’t matter how many cores you have if they cannot
communicate with each other, memory, and IO with performance and relative ease
of programmability. Supporting this many cores requires a network-on-chip
which adds latency and complexity to all operations where a core must access
resources outside of itself.

There is no way that these things could achieve reasonable throughput without
a particularly convinient workload and very low level programming. Systolic
matrix multiplication on a array of cores connected in a toroidal network-on-
chip for example (see Adaptive’s chips).

There is no way that this thing has cache coherency. If your lucky it might
have some hardware mailbox/mutex/semaphore to help keep all the cores in sync.

Really if you want this many ALUs gang them together into a vector machine
like a GPU!

Anyway, all just speculation; there’s no substantiative details on the
announcement or their site.

Not that I don’t want to see new and interesting things in computer hardware;
I do! I just think that iterating away on the RISC is not the way to make
leaps and bounds.

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ianai
I thought there was a breakthrough a while ago about syncing cores with low
latency?

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greglindahl
Message passing.

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ctw
In my head, CPU's have few cores (1-16) but those cores are very highly
optimized and have lots of specialized hardware in them. In comparison, GPU's
have many cores (thousands) that are comparatively dumber, but that's fine
because we use GPU's when we want to run lots of simple operations in
parallel, like image processing, etc.

With that in mind, where does this chip fit into the current space? Is it
meant to replace both? It contains their two different kinds of cores, which
I'm assuming are similar to the complex cores we have in CPU's and the simple
cores we have in GPU's. Does this mean that if chips like this are used in the
future, we wouldn't have separate processing units?

Also, how does one use an SoC like this? What are its inputs and outputs? How
do I access those? Do I need specialized hardware? Can I plug it into my
existing desktop? Do they expect a new system to be built around this, or is
it a drop in replacement for a part in an existing system?

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qume
And in the same vein, does this encroach on some use cases for FPGA?

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rijoja
Surely even with parallel programming being notoriously hard to get right it's
most probably easier than FPGA programming.

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techdragon
The article makes it clear they are unveiling/announcing their plan/intent to
develop this chip design. Follow the links to their website and it feels like
they are so far from “ready” it hurts.

TLDR: They are just getting PR for their not yet developed hardware designs,
and they haven’t even explained who will be buying them.

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dboreham
We used to use the term “Vaporware”

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amacbride
Dave Ditzel is no slouch. I'll be interested in seeing how this goes.

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jecel
Yup: CRISP, Sparc, low power x86 (Transmeta) and now high performance RISC-V.
Business decisions (such as Lucent dropping out of the processor market or IBM
killing its bulk CMOS fab) have kept his technical achievements from getting
the commercial success they deserve. I hope things go better this time.

