
Efficient embedded computing (2010) [pdf] - luu
http://cva.stanford.edu/publications/2010/jbalfour-thesis.pdf
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davemp
TL;DR: A distributed "nano-processor" [1] architecture with a bunch of neat
tricks to allow the "nano-processors" to coordinate with the help of a master
processor.

It looks like it could have potential if they come up with a sensible paradigm
to progam it. Unfornately it looks like they're trying to shoehorn C into an
architecture that's wildly different than C's original target. [2]

I don't really see this taking significant market share from FPGAs/ARM in its
current state.

[1]: they use the term ensemble but that is unintuitive

[2]:
[http://cva.stanford.edu/projects/elm/compiler.htm](http://cva.stanford.edu/projects/elm/compiler.htm)

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eli_gottlieb
I look forward to reading this. A system that can really do better than FPGAs
and ASICs at compromising between speed and programmability is a multi-million
dollar breakthrough.

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rayuela
2010 flag!

