
MIPS Strikes Back: 64-bit Warrior I6400 Arrives - amardeep
http://www.anandtech.com/show/8457/mips-strikes-back-64bit-warrior-i6400-architecture-arrives
======
rwmj
Will Imagination actually publish specs so that Linux is able to implement
anything without reverse engineering? The history of binary blobs on PowerVR
is not encouraging.

~~~
ris
I don't imagine* things would ever be as bad as "linux not being able to run",
but Imagination are indeed going to have to seriously rethink their hacker-
friendliness if they want to get anywhere in this market.

* pun acknowledged

------
xradionut
MIPS hasn't gone anywhere. You can get PIC32 chips and boards based on them
for various projects include the Open Source TenTec 506 Rebel radio.

While there's more tools and chips for ARM on small systems, I still prefer
MIPS due to lower complexity/insanity of the tool chain.

It's hard to get any of the large system boards and multiprocessor chips
without being an OEM.

~~~
alexvoica
I don't know if you saw this MIPS-based dev board being announced
[http://blog.imgtec.com/powervr-developers/new-mips-
creator-c...](http://blog.imgtec.com/powervr-developers/new-mips-creator-
ci20-development-board-for-linux-and-android-debuts)

~~~
xradionut
It's currently unobtainium, it can't be purchased.

------
higherpurpose
Strange. He talked about that fact that MIPS has been lacking compatibility
for Java apps on Android...but completely disregarded the fact that Android L
will compile apps natively on MIPS, just like on ARM.

~~~
Sanddancer
He's talking about something different. While dalvik's going away and apps
will soon be compiled with native code, Android apps can already bundle native
code in with the app through Java's Native Interface API. Such code is
architecture specific, and usually only available for devices running under
ARM, with occasional support for x86 processors. Additionally, some native
code would only be available for specific architectures; Firefox mobile won't
run on older phones because it requires an FPU, which wasn't guaranteed until
ARMv7.

~~~
alexvoica
For legacy, native non-MIPS code, we rely on binary translation.

~~~
rodgerd
Given I'd expect most JNI code on Android devices are supporting games, I
doubt emulation is going to be a big winner.

------
ChuckMcM
I think it is an interesting strategy, creating what is essentially an
alternative to ARM/Mali as a single license SKU. There are rumors floating
around that this chip is in a soon to be unveiled Chromebook. I take those
with a large grain of salt since every hardware vendor seems to say "This is
in the next gen (Google/Apple) device!"

Would love to see additional competition here, but Imagination has not been
very forthcoming in the past on specs, so maybe Surface material rather than
Android/Linux material.

------
fulafel
Amusing headline considering MIPS chips (R4000 etc) were the first 64-bit CPUs
outside supercomputers in the early 90s.

~~~
discardorama
I thought it was the DEC Alpha which was the first commercial 64-bit CPU?

~~~
kps
There were 64-bit _CPUs_ long before there were 64-bit _microprocessors_. I
don't know what the first was, but the IBM 7030 was a 64-bit machine in 1961.
(My first computing job, as a co-op, involved testing a UNIX emulation
environment for the 64-bit Control Data 180 series, in 1985.)

~~~
fulafel
Well, Alpha and MIPS (and some supers before them) had 64 bit addressing to
handle more than 4 GB of address space. The 7030 had just a handful of memory
and no vm, through it did have a 64 bit word size. ARM and x86 have been able
to handle 64 bit numbers without anyone claiming they're 64 bit.

~~~
kps
Okay. The Cyber 180 for instance had 48-bit addressing.

~~~
fulafel
The CDC 180 sounds pretty interesting from the WP article, and, I agree,
64-bit. So not just supers then.

------
GrinningFool

        Imagination’s executives have also stated they are prepared to offer aggressive IP bundling discounts
    

My mind boggles at attempting to enumerate the number of issues implicit in
that simple statement.

------
solarexplorer
From the article: "Keep in mind that these processors use different
instruction sets (ISAs) so DMIPS are not directly comparable."

But DMIPS doesn't refer to million instructions per second, but to the
relative performance for a standard benchmark relative to a VAX 11/780 (which
is considered to run at 1 MIPS). So any differences in instruction sets are
already accounted for.

[http://en.wikipedia.org/wiki/Dhrystone](http://en.wikipedia.org/wiki/Dhrystone)

~~~
TheLoneWolfling
You're assuming that that benchmark reflects real-world performance, but that
assumption is not necessarily correct, especially given the age of the
benchmark - I would be very surprised if the most commonly used instructions /
etc have not shifted since 1988.

Also, the page you linked has a number of other concerns about said benchmark.

~~~
solarexplorer
We are in violent agreement here. My point was just to note that the author
apparently did not understand the difference between Dhrystone MIPS and "real"
MIPS. He probably also did not understand that Dhrystone is an ancient
benchmark that should not be used anymore.

But that's what you get when don't do your own benchmarks but copy/paste
numbers from marketing material...

~~~
alexvoica
Yes, I think that he might not be familiar with how DMIPS works (or what it
is).

------
rayiner
> When Imagination Technologies acquired MIPS Technologies in 2012 for $100
> million

Pretty depressing that a pioneering company like MIPS was sold for such a
relatively small sum.

~~~
dman
SGI sold for $25 million. [http://bits.blogs.nytimes.com/2009/04/01/once-
mighty-sgi-sol...](http://bits.blogs.nytimes.com/2009/04/01/once-mighty-sgi-
sold-to-rackable-for-25-million/?_php=true&_type=blogs&_r=0)

------
angersock
What's kind of neat is that you can put a downright _silly_ amount of MIPS
cores on something. Octeon, for example, with like 48 cores:

[http://www.cavium.com/OCTEON_MIPS64.html](http://www.cavium.com/OCTEON_MIPS64.html)

~~~
kps
Xeon Phi currently ship with 57–61 cores (roughly P54C + AVX-512, IIRC).
(Disclaimer: I once worked for Intel.) CPU cores are not a very big part of
the die on most contemporary devices.

~~~
valarauca1
Question (since you seem to know about the Phi) is the Phi x86_64 (and its
extensions), or is it as black boxed every other GPU like device?

~~~
Narishma
It's basically a large number of in-order P5- (or Atom-) derived cores with
4-way SMT and beefed up SIMD capabilities (two 512-bit units per core).

