
HOPL IV: History of Programming Languages – Accepted Papers - matt_d
https://hopl4.sigplan.org/track/hopl-4-papers#List-of-Accepted-Papers
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lioeters
"These are the nineteen papers that will be presented in London in June."

So many luminaries on that page: Guy Steele, Bjarne Stroustrup, Rich Hickey,
Dan Ingalls..

"The Papers track of HOPL-IV will include published papers that will be
complemented by oral presentations at the conference."

"The Program Committee encourages submissions that discuss and analyze the
historical development of individual programming languages, programming
language families, language features, design themes, and other strong
influences on the direction of programming language design, implementation,
and usage."

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WalterBright
Our D paper got accepted, too!

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pbiggar
I was super lucky to be able to go to HOPL 3 in 2007. Amazing conference.
These papers are a little less exciting to me, but it sounds awesome all the
same.

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jswrenn
LabVIEW! As a PhD student at the intersection of programming languages and
computing education, the suggestion that Scratch delivered visual programming
to the previously-unempowered masses has always ground my gears. Computer
science academics can have a rather myopic view of end-user programming.

I'm _very_ excited to read this paper.

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setpatchaddress
Still waiting for someone to publish a volume of HOPL-III papers. The HOPL-I
and -II books are essential for those interested.

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transfire
Links for these prior books?

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JadeNB
Clicking through from
[http://research.ihost.com/hopl/HOPL.html](http://research.ihost.com/hopl/HOPL.html)
gets one to electronic access to the volumes.

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rambojazz
I wish there were the actual papers instead of titles only.

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fluffything
Usually these are published sometime after the conference, there are two
volumes already containing the papers of previous conferences.

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Rochus
Interesting that Verilog is considered a programming language. And Smalltalk
and C++ were both already covered in HOPL II.

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imglorp
I'll allow it as a mind altering substance, along with other HDL's.

Both let you think about the same problem in structural, behavioral, or
dataflow styles. Taping out hardware is optional.

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Rochus
That's likely how SystemVerilog came into being.

