
YC's Xerox Alto restoration Part 7: disk exerciser trial [video] - kens
https://www.youtube.com/watch?v=c0sL_FwPVwM
======
gh02t
I think the really interesting part about all of this is that it is
_possible_. You can hook up an oscilloscope and a logic analyzer and really
figure out what's going on all the way down to reading the microcode and
decoding the signals. You won't be doing that on a modern system.

~~~
LeonM
I don't see why it should not be doing that on a modern system. It will just
be a lot harder to do (less access, wider busses, much higher frequencies),
but possible non the less

~~~
gh02t
Ok, practical. An oscilloscope that can probe a high speed bus like PCIe is
priced in the same range as a house. Not to mention motherboards are 8-10
layer PCBs, which makes it pretty tough. The high level of integration is also
going to make it rather difficult to get inside a lot of the parts and listen
in, much less the sheer amount of stuff one person would have to know to
understand what is going on from the bottom up is a lot more unreasonable than
it is on a relatively primitive machine (architecture wise) like the Alto.

------
Sanddancer
Looking through the schematic of the disk controller, it wouldn't surprise me
if the bad inverter also ended up causing the parity errors. That one pin ends
up affecting error detection, clocking, and addressing of the disk controller,
which could very well end up manifesting as the parity errors you're seeing,
especially given that your entries suggest that the errors went away once you
dead bugged the inverter. Regardless, this is definitely an interesting series
and I wish you lots of luck in getting things running.

