Ask HN: Why not re-interpret Moore's law from MTr/mm2 to MTr/mm3? - punnerud
======
wmf
So you're basically talking about 3D stacking or integration. This doesn't
have much effect, because replacing a single die with a die stack is basically
a wash; it's the same transistors on the same silicon area, just rearranged.
(3D NAND and 3D XPoint are an exception to this.)

And generally stacking is less area-efficient than a single die because TSVs
are enormous. Stacking is more energy-efficient because it allows traces to be
shorter (e.g. HBM2) and it's more space-efficient at the product level by
reducing the amount of packaging.

