
The Booming Server Market in the Wake of Skylake - rbanffy
https://www.nextplatform.com/2017/12/01/booming-server-market-wake-skylake/
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cm2187
I can’t find in the article what is so special about skylake that enterprises
would delay their purchases.

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tomalpha
IMHO it’s less about Skylake being special and more about the previous
generations having fairly small improvements over their predecessors.

Broadwell was never a huge leap for general purpose server performance. At
least it didn’t get perceived as such. It seemed to concentrate on being good
at the low power end to compete with ARM and more virtualization features
iirc.

For some, rather like phones these days: they’re good _enough_ not to need a
refresh as often as they might have been.

For others Skylake is the first real jump / change in performance (the cache
hierarchy and core interconnect topology changes are particularly interesting
to me).

For yet others, they delayed refreshing for longer than they used to: “we
might as well wait until the next release now”. And once Skylake was out in
all its thousand-different-sku glory they bought it.

Edit: typo

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rincebrain
Broadwell for servers was noteworthy for the Xeon-D line, which has some neat
performance characteristics in a tiny power envelope, but it was very targeted
at the laptop market - hell, there were only 6 models of desktop processors,
compared to 32 laptop models, or 50+ server processors (half of which are the
Xeon-D line, and the other half were so delayed that the E3 Skylakes landed
before the E5 Broadwells did, and then the E5 Skylake equivalents got delayed
forever, presumably in part to finally also support the socketable Xeon Phis
Intel wanted so much)

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python-guy-vt
I think even more are holding out for Epyc.

~~~
stingraycharles
Is Epyc really going to make any big impact on the global server market? Call
me old-fashioned, but I just can't imagine enterprises moving to Epyc any time
soon. Intel has built a really powerful brand with Xeon over the years.

~~~
akvadrako
People who buy a lot of servers look more carefully into their purchases than
consumers. Brand reputation does matter, but if you can save 10% by switching
to another quality brand, it's a no brainer. Of course you'll want to do a
evaluation run for a few months.

~~~
LeifCarrotson
There are going to be small shops for which the familiarity of Xeon will be
enough to keep them in the same pattern. If 10% of your costs are just a few
weeks or months of engineer time, and you only have an engineer or two to
spare, it's a big risk and expense to figure out the different costs and to do
that evaluation run. There are a lot of shops like that.

There are not as many huge enterprises, but they are a huge amount of the
market in terms of volume, and at those scales a 1% savings is worth years of
engineering expenses, and you can bet that they will be doing the studies and
choosing the most cost-effective option regardless of previous decisions.

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thisisit
Unrelated but anyone knows how the market for ARM chips look like? Are the
offerings from Qualcomm and Cavium any good?

~~~
rwmj
The Qualcomm Amberwing absolutely rocks. Fastest server I've used for a while.

Edit: Teaser picture: [https://rwmj.wordpress.com/2017/11/20/make-j46-kernel-
builds...](https://rwmj.wordpress.com/2017/11/20/make-j46-kernel-builds-on-
qualcomm-amberwing/) As usual because of NDAs I'm not allowed to publish
benchmarks.

~~~
trhway
curious - why parallel build with about 32 compiler (ie. cpu heavy) instances
with total 93% user cpu load (and no wait, etc) shows individual processes at
48% cpu max on that machine (which i suppose is at least 24 cores and probably
48)? In that situation on Lintel the top processes are usually shown as close
to 100% cpu. Is it just a quirk of system accounting on those ARMs? Or do all
these compiler processes contend on something (like for example may be memory
bus)?

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wyldfire
It is fairly unlikely to saturate 46 CPUs with a kernel compile. However it's
probably much better off than if it were C++ source. Yes, I'd absolutely
expect memory contention when it's not I/O bound.

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arca_vorago
To hell with skylake, I can't wait to build dual eypc servers. I learned about
the power of heavy parallelization while sysadmin'ing at a genetics lab, and
ever since building a quad CPU opteron system I've wanted more of that kind of
server. This time though I only need two CPUs to get 64 cores!

