
‘Better Yield on 5nm Than 7nm’: TSMC Update on Defect Rates for N5 - rbanffy
https://www.anandtech.com/show/16028/better-yield-on-5nm-than-7nm-tsmc-update-on-defect-rates-for-n5
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samfisher83
It seems to be that than TSMC needs to increase their prices. They should be
extracting more margin when compared to AMD, NVDA etc. They are just killing
it. One of the main reasons with intc had better chips was they had the best
Fabs.

Its kind of sad we used have guys like shockley, moore, kilby etc. The reason
why silicon valley is called silicon valley. Now we are just falling behind
Taiwan, south korea, and maybe china.

~~~
edge17
Specialization is a feature of global trade. Regions focus on specific
industries to gain expertise and increase efficiency.

Specializations change over time. The US, specifically Silicon Valley, has
different specializations today than it did in the 60's. A lot of the
semiconductor specialization moved overseas, costs came down, and in general
the world is richer. Other specializations include things like China and
injection molding, Japan and mechatronic technologies in the 80's and 90's,
Thailand and lenses, etc

Obviously the protectionist crowd would take issue with all this, but free
trade theory is studied and applied all over in trade agreements,
specialization zones (like Shenzen), etc. Generally speaking though, the cost
of attempting to be self sufficient in everything (like semiconductor
manufacturing) means closing borders to competitors outside, which eventually
leads to inferior product. With robust competition, the consumer usually wins
on both quality and price. Obviously there are other consequences, such as job
migration etc. In general though, everyone is lifted up and made richer over
time (evident by the fact that there is quantitatively less poverty in the
world today and the 1960's and even the most poor can enjoy things like
cellphones, leather jackets, and shoes that fit well that even the kings of a
century ago could not). The system isn't perfect, but atleast in my eyes it is
the one that does the most good for the most people.

~~~
skohan
> everyone is lifted up and made richer over time

Really? In the 1970's in the US it was possible to own a house and support a
family of 4 on a single income in the manufacturing sector. It was also
possible to work your way through college and exit with a degree and no debt,
in a job market which made that worth it.

Yes global poverty has decreased, but the material standard of living has
decreased for most people in the working class in the developed world, while
wealth has skyrocketed for a select lucky few.

It's more complex than saying "everyone is made richer" \- it seems what has
happened is that a few people have been made _much_ richer, and everyone else
is somehow equalizing somewhere closer to the bottom.

~~~
thunderbird120
>the material standard of living has decreased for most people in the working
class in the developed world

Who told you that? Both inflation adjusted median personal and household
income have increased by double digit percentages over the past 50 years. In
the case of household incomes that still happened even with the shrinking
average household size (i.e. number of people in a household).

[1][https://fred.stlouisfed.org/series/MEPAINUSA672N#0](https://fred.stlouisfed.org/series/MEPAINUSA672N#0)

[2][https://fred.stlouisfed.org/series/MEHOINUSA672N/](https://fred.stlouisfed.org/series/MEHOINUSA672N/)

~~~
novok
You're not focusing on the other side of his statement, where costs for
housing, healthcare and education have also skyrocketed, along with the
development of the two income trap.

What he said isn't controversial for most academics studying this.

[https://en.wikipedia.org/wiki/The_Two-
Income_Trap](https://en.wikipedia.org/wiki/The_Two-Income_Trap)

[https://medium.com/@6pranavk/insight-of-the-day-cost-
disease...](https://medium.com/@6pranavk/insight-of-the-day-cost-
disease-c14f50c1cd2e)

~~~
wernercd
And neither of you are focusing on the "extra" stuff you don't "need" \- high
speed phones, large TVs, cars with air bags, etc.

Want to compare to 1970? Then live with those restrictions and you'll probably
have enough money to pay for insurance, college, etc.

~~~
vkou
This is complete nonsense.

Large TVs in 2020 cost just as much as small TVs did in the 70s (if not less),
adding air bags to a car costs mere hundreds of dollars, and is ammortized
over 20 years, and cancelling your phone plan is not going to let you support
a family of four on a single blue-collar income. Shit, cancelling your phone
plan won't even compensate for the _annual_ growth in your health insurance
premiums - which is something that compounds every year.

~~~
wernercd
"Air bags is amortized over 20 years" Cars don't last 20 years, generally...
5-10. And airbags are one of hundreds of "improvements".

TVs are an example of the plethora of technology that most homes have. From
microwaves to air conditioners to cell phones...

"Canceling one thing isn't going to support your family" Which is why I didn't
mention one thing... I mentioned a handful of things. A host of "modern
conveniences" that add up.

Education, health insurance and other things cost more? Those are also things
that the government has stepped in to make more affordable as well... which is
a massive topic in of itself.

My main point stands... quality of life and cost of life has risen with
hundreds of costs that add up (a mere 100 for an air bag... a mere couple
bucks a month for data on your phone... a mere 5 for text messages... a mere
100 for a microwave... etc.etc.etc.etc).

Remove all the "extra" stuff that's standard today compared to 50 years ago
and even with outliers (IE Health Insurance), you'll still be much closer to
being able to afford the same quality of life as "way back then".

------
exar0815
This is a problem for Intel on four fronts at the same time:

\- x86-CPUs from AMD with better efficiency in Desktop and Datacenter

\- Apple-ARM Macbooks showing that it doesnt have to be x86 at all

\- x86-APUs from AMD with Navi-GPUs versus Intel Xe

\- Intel Xe as Compute vs. NVidia Cards.

All of these pivot around Intel at least matching the process of their
competitiors. Also, Intel has optimized 14nm that much, that their initial
yields and performance gains on 10nm and 7nm will probably piss-poor
initially.

~~~
bgorman
It is not as big of a problem as you think for 3 reasons.

1\. Intel has purchased capacity from TSMC which will presumably be used for
Xe HPC. 2\. TSMC does not have enough capacity for AMD to take significant
market share 3\. Intel still has a lock on high margin datacenter parts

~~~
JoshTko
TSMC is is only going to give Intel unused capacity, essentially lowest
priority for a few reasons. 1. Intel will drop TSMC the moment their fabs
start working as expected - so you don't want to depend on Intel orders at
all. High margin orders one quarter that are gone the next will not help
TSMC's business long term. 2. TSMC has enough demand from other companies -
they even turned down NVIDIA for most of their GPUs 3. A weaker Intel allows
TSMC to command higher margins long term. helping keep Intel while it's still
a massive competitor makes no strategic sense.

------
baybal2
EUV being the biggest suspect for yield boost. The 6nm EUV, and 7nm EUV were
niche processes incompatible with non-EUV versions, and had own special design
rules. I believe very few companies went for them other than for trial runs to
gather expertise.

TSMC 5nm uses EUV by default, and very likely has no quad patterning layers,
and possibly they threw out double patterning layers too.

Not having to give any considerations to multiple patterning should allow for
much freer design rules, and let recover density from sacrificial lines.

~~~
jules
Can you combine EUV with double patterning?

~~~
brennanpeterson
Yes, and I believe TSMC does. Because the dose scales as resolution to the 4th
power (or so), it is better to double pattern than to try to single pattern at
massive dose. There are also cases where double patterning can reduce defects
in self aligned schemes.

------
londons_explore
I've not seen any fab where defects can be traded off against any other
parameter...

For example, can I get double the logic density if I'm happy to get defects
from 0.1 per square centimeter to 1000 per square centimeter? If I can, I'd
very much like to for some usecases. Think of things like SRAM, where you can
simply have a "bad address handling unit", which keeps a list of the bad
addresses and maps them elsewhere. As long as my design is fine with adding a
few cycles latency on 1 in a million ram accesses, I'm fine.

~~~
guepe
Chips are not designed to have fault tolerance. The typical solution on large
chips today is to have large number of identical units, and use fuses to
deactivate some when they are faulty. This is called binning and how all
manufacturers build their line of products. Design and validation of fault-
tolerant chips is MUCH more involved, which slows down next-gen products a
lot. It's in general better to simply use today's process ASAP, with no or
little fault tolerance.

The exception is wafer-scale chips, which are chips that span multiple
"reticles", i.e. the size of the masks used to manufacture normal chips.

I have a Ph.D. thesis linked to building a wafer scale chip (ala cerebras,
although 10 years ago). And cerebras AFAIK is the FIRST commercial product
using wafer-scale approaches. Maybe we will see more products ? I have
doubts...

Note also that defect density varies depending on location of the chip on the
wafer. There are areas with more defects on average, so it's not as simple as
1 number.

~~~
mlyle
> This is called binning

Binning is any kind of sorting by silicon quality. It can refer to sorting by
the number of "good cores" you get, but it has usually meant sorting by speed
grade or other characteristics.

> and how all manufacturers build their line of products.

Having identical functional units you disable is a great yield maximization
strategy if it fits your product. Most semiconductor products are not in this
category-- it's mostly just multicore CPUs and GPUs that have a lot of
identical cores and relatively small uncore.

~~~
brennanpeterson
Agreed on binning, but all DRAM and all NAND are fault tolerant. Between all
memory, GPU and GPU-like, and CPU....I have all but mobile, or about 70% of
the market.

~~~
mlyle
Yes, memories too, are a good mention.

> I have all but mobile, or about 70% of the market.

In dollars, maybe, but there a whole lot of units of things that you cannot
build a meaningful deactivation strategy on.

~~~
brennanpeterson
Sure! It is a huge mix. ASICs don't, mobile cannot, and you can't really just
ignore.

But there are also other tricks, like redundant vias, or SRAM spares, which do
make 'yield' less listed by defects than it might first appear.

------
greentimer
It's slightly misleading to say that there were better yields for 5nm than 7nm
because according to the graph in the article the yields have been almost
exactly the same, maybe slightly lower. The article's assertion that the
defect rate is a key metric seems dubious since it seems to have been roughly
the same for the last three generations of chips and thus kind of a nonfactor.
But in fact low yield rates were the reason Intel famously had to delay its
7nm processes. The fact that defect rates have been kept roughly constant
seems to suggest they can go even further into 3nm processes, but this is the
problem with extrapolating from graphs with too little data - at 3nm they'd
run into very challenging physical limits and it's not clear we'll ever get a
3nm chip.

It is amazing to me that we can achieve such low defect rates on projects so
complicated as highly brain-insecure sticks of meat that evolved to hunt and
forage. Under the principle of radical skepticism the true defect rates could
be much higher.

~~~
55873445216111
It sounds like you are conflating "Defect Density" and "Yield". These are not
the same. Yield is a function of Defect Density. The function is exponential.
Even the appearingly "slight" improvement shown in the Defect Density shown in
graph is significant in terms of Yield.

------
londons_explore
This is a bit of an artificial measurement... I mean in the charts shown, this
claim of "defects are lower" could equally be stated as "Mass production was
started later in the development process".

~~~
happycube
Either way, they're great numbers.

------
sp332
Is it possible that they are constraining the design of circuits to elements
that will have a higher yield? These probably aren't just "the same circuit
but smaller".

~~~
AgloeDreams
It's assumed that these results are of Apple A14 or A14X chips.

------
ivanstame
*Intel crying in the corner of the room :D

~~~
whereistimbo
Intel who? If you read comment from anonymous ex intel engineer it was kind of
predictable anyway.

~~~
exar0815
Do you have any source for that comment?

~~~
evilos
They appear to have been taken down at the personal request of the intel
employee. They were originally distributed by 'Retired Engineer' on twitter.
See this page for some details: [https://www.guru3d.com/news-story/ex-intel-
employees-outs-di...](https://www.guru3d.com/news-story/ex-intel-employees-
outs-dirt-about-intel-talks-about-internal-difficulties.html)

------
dragontamer
Wow. That bodes good news for TSMC partners (AMD, NVidia, Qualcomm, and
Apple).

I doubt they'll pass on the savings to consumers however. Certainly not Apple
or Nvidia, and so the competitors Qualcomm and AMD have no reason to drop
prices either.

