
Will Chiplets Save Moore's Law? - chipletman
https://semiengineering.com/chiplet-momentum-rising/
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tracker1
Moore's law is about transistor density, which has already slowed way past
what Moore's Law (more like Moore's Observation) noted, a doubling of density
around every ~18 months (give or take 6)... Stacking may have allowed the
trend to continue, but it doesn't seem to work well.

What chiplets offer is effectively more compact compute units designed to work
together. What was effectively a component design for multi-cpu systems a
couple decades ago happens in a single socket package. With some better design
considerations.

This allows for an optimization for loss... if you have a huge single chip,
there's more chance you lose a whole chip in a wafer, meaning higher
manufacturing loss. With smaller chiplets, you may lose one smaller chiplets,
but the other 4-6 around that one lost still works. This means better yeilds
out of each wafer.

The other advantage is that you can mix different manufacturing nodes... such
as compute or graphics chiplets being latest and greatest with memory and bus
interfaces on a prior generation. Again, this allows for greater production
and reducing loss.

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pedrocr
_> Moore's law is about transistor density, which has already slowed way past
what Moore's Law (more like Moore's Observation) noted, a doubling of density
around every ~18 months (give or take 6)..._

What makes you say that? It looks right on track:

[https://en.wikipedia.org/wiki/Moore's_law#/media/File:Moore'...](https://en.wikipedia.org/wiki/Moore's_law#/media/File:Moore's_Law_Transistor_Count_1971-2018.png)

Dennard scaling is the one that has broken down and forced us into multi-core
versus high-frequency:

[https://en.wikipedia.org/wiki/Dennard_scaling](https://en.wikipedia.org/wiki/Dennard_scaling)

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ghaff
The two are pretty related though. If you could build a chip with more
transistors economically but had to run it at 500MHz for cooling reasons, you
probably wouldn't do that. (The exact nature of the challenges in the two
domains differ though.)

>What makes you say that? It looks right on track:

Especially given that the vertical axis is a log scale, it looks to me as if
it's flattening out a bit. I'd have to run an actual regression but that's
what it looks like in terms of eyeballing. (And it's consistent with what we
know of process nodes slipping out.

~~~
birdyrooster
The processors which are creating this flattening of the curve are for low-
power, mobile or embedded use-cases where transistor density comes at a bigger
cost. The more cores you add, the more overhead power consumption there is for
switching.

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kevin_thibedeau
Density affects high end processors too. We already are past the point where
it's necessary to throttle down to protect a processor from self-destruction.
Nobody wants to employ the sort of heat exchanger necessary to keep running
full bore all the time. Power consumption takes a back seat to power density.

~~~
vardump
It's been past that point more or less for 20 years. Thermal throttling is
nothing new.

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bob1029
It really depends on how you interpret Moore's law. I personally think that
counting all your transistors across multiple discrete dies is kinda cheating.

But, I absolutely love the concept of chiplets and can see a trivial 10x in
logical transistor density, even if we don't shrink the process nodes any
further or even make major changes to the current generation of chiplet-based
CPUs.

We are currently only arranging these things in 2D. If AMD/TSMC develop a way
to stack chiplets in 3 dimensions, we could wind up with another huge bump in
logical transistor density per socket/node.

Chiplets are ultimately about solving the manufacturing and business problem
of defect density. There isn't much additional magic going on here in terms of
beating Moore's law.

~~~
wtallis
> If AMD/TSMC develop a way to stack chiplets in 3 dimensions, we could wind
> up with another huge bump in logical transistor density per socket/node.

Stacking is pretty close to being a solved problem. Cooling a stack of high-
power chips is the challenge.

~~~
Animats
Right. Memory can be stacked. Flash memory, especially. Only a small fraction
of memory cells do anything on each cycle. But parts where most of the gates
do something on every clock, like CPUs, heat up too much.

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monocasa
It's not a new thing. The Vax 9000 had multichip modules with a very very
special interposer for the same reasons. The transistor density they wanted
combined with the yields they were getting meant that they couldn't fit the
whole design on a single chip, so they broke up the chip and tried to heavily
control the cross chip interconnects more than you could if you went out to a
PCB and back to sort of 80/20 your way to what a single chip would get you.

The difference now though is that it's not certain that yields will get
markedly better at these nodes and smaller, whereas yeah, we got a lot better
yields on much smaller nodes than 1750nm ECL logic eventually.

~~~
Seenso
> The Vax 9000 had multichip modules with a very very special interposer for
> the same reasons.

Pictures, for anyone interested:
[https://vaxbarn.com/index.php/feat/8-collection/394%20-dec-v...](https://vaxbarn.com/index.php/feat/8-collection/394%20-dec-
vax9000)

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tails4e
Moores law has both scaling and economic aspects. Folks seem to focus on the
scaling, which to a degree is still happening, but the economic aspect has not
been true for the last few nodes

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pastrami_panda
I've recently seen two talks on how Moore's Law is alive and kicking, by none
other than Jim Keller and (IIRC) a chief scientist at TSMC. Wonder why this
notion of Moore's Law dying stays so pervasive.

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NortySpock
Do you have links to those talks?

Here's what I found:
[https://www.youtube.com/watch?v=Nb2tebYAaOA&t=1805s](https://www.youtube.com/watch?v=Nb2tebYAaOA&t=1805s)
(94min, jump to 30m for Mr. Keller discussing Moore's law and his
interpretation of it.)

Jim Keller: Moore's Law, Microprocessors, Abstractions, and First Principles |
AI Podcast Lex Fridman, host.

~~~
ksec
I think that is the one people should watch. The 1000x1000x1000 atoms analogy.
But then again he hasn't touch on the economic issues of Moore's Law

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Animats
Those are called "multi-chip modules". The Pentium Pro was built that way. AMD
uses them today.[1] They're useful, but more to help with cooling and yield
than density. The transistors are not any smaller.

[1]
[http://developer.amd.com/wordpress/media/2017/11/LE-62006-SB...](http://developer.amd.com/wordpress/media/2017/11/LE-62006-SB-
Latency-170824-Final-1.pdf)

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unlinked_dll
I'm both irked and refreshed to read such a poorly written article. There are
a few grammatical errors and generally poor prose that bother me as a reader.
At the same time it's clear the author is an engineer and well versed in the
subject matter and attempts to gift some of their expertise as a reader.

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drallison
The title about "Save Moore's Law" appears to have been inserted as click
bait. The chiplet idea as an approach to building configurable logic has some
merit but is really unrelated to Moore's Law.

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drallison
No, chiplets will not save Moore's "law". They may provide another path to
configurable logic beyond custom ASICs and FPGAs. It's kinda like boards and
TTL logic but at the chip scale.

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ksec
Did they change the Title or Someone submitted it as this? The article is now
"Chiplet Momentum Rising". And no where does it suggest Chiplet saving or
extending Moore's Law.

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skyfaller
Betteridge's law of headlines vs. Moore's Law: who wins?

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chipletman
Will chiplet model work? Or is it all hype?

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clhodapp
The chiplet model already happened and is already working. AMD's much-lauded
new line of processors are all using it.

