

TI Mixes ARM cores with DSPs and programmable logic - martxyz
http://www.eetimes.com/document.asp?doc_id=1326403&

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CountSessine
That's nice.

In the article, a TI rep is quoted saying, "We believe customers will be able
to develop their devices three times faster than when using FPGAs — in days
rather than weeks"

I'm kind of wondering about that. Maybe if you were already up and running
with syslink/codecengine/xdctools, etc. IMHO, working with TI's c6X DSPs was
just awful, and their software suite was one of the only dev environments that
has made me pine for Xilinx's stuff.

Syslink? Perhaps the worst-behaved linux kernel module I've ever encountered.
Xdctools? Did anyone ever really want yet another build system? And in
javascript? When we were working with the toolchain, even TI considered it
inscrutable - their own image loader was a hacked example buried deep in the
xdctools examples dir. And support? Every time we sent an email to TI, all we
got was, "have you asked this question in the TI forums?" It was such a
ridiculously poor standard of support that eventually it became a joke on our
team.

But I know that in embedded, the quality of the software tools is rarely
considered. Oh well.

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ChuckMcM
This is additional information that what I suspected was happening, is, which
is that the combination of some hard "cores" \+ FPGA fabric is becoming
useful. The original Xilinx run at this used Power PC cores but the current
stuff (Zync) using ARM cores has had much better traction.

Looking at the TI site they want $328 each[1] in singles, not a great price
point but not horrible given their performance but I don't think it crosses
into the 'revolutionary' category.

That said, one of these and a couple of those 4 GSPS 12-bit ADC's and you'd
have a pretty sweet front end for an oscilloscope. My new 200Mhz scope only
has 2.5GSPS front ends on it and it cost $6K.

[1] This compares to $60 for singles of the Zync chip.

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unwind
Tiny correction: Xilinx' combination ARM+FPGA SoC is called the Zynq
([http://www.xilinx.com/products/silicon-
devices/soc/zynq-7000...](http://www.xilinx.com/products/silicon-
devices/soc/zynq-7000.html)). This latest device from TI seems to be way
higher-end than the Zynq (not surprising, since it's also newer).

~~~
ChuckMcM
Thanks, I am not a fan of phonetically obscured names :-). Xilinx's first
foray into this space was the upper end Virtex series (the Virtex 4 and Virtex
5), I went back and looked at the pitch they gave me in 2005 around this. So
here we are 10 years later and it seems like this stuff is finally getting
closer to mainstream.

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Sanddancer
Yeah, the headline on eetimes is a bit...sensationalistic. It may be useful
for cellular signal processing, but there are quite a few other things that
fpgas are used for. Now, were this chip to have a proper PCIe x16 bus dangling
off it, and elements useful for video encoding/decoding, it may be more
intriguing. Right now, it's just an interesting toy for telcos.

~~~
martxyz
So... we got a new plataform who is better to a specific range and eetimes
says "TI Obsoletes FPGA"? That's what i think when i post it.

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braum
I hardly even understand FPGA's but I don't think TI's newest tech will
obsolete it. Intel just purchased Altera for $16.7B and I've already seen them
release updates to their line including fabrication on 14nm or less.

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martxyz
But with intel buying altera and they starting to use FinFET technology , i'm
quite curious how XILINX,TI and other will react.

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craigjb
Xilinx invested heavily in TSMC's TSV interposer and likely their IN-FO fan-
out packaging. These allow them to integrate more silicon area in the same
package space. It can potentially offset the technology node gap, and maybe
for lower cost. Yes, TSV is expensive, but a process node is even more
expensive.

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DrHoppenheimer
Multi-die FPGA packages are a giant PITA to deal with, compared to monolithic.
It's a lot harder to resolve timing problems.

There's a small customer base that's already used to partitioning their
designs across multiple FPGAs, and taking the huge performance hit from it
(e.g., ASIC emulation). But for most, yeah... giant PITA.

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wolfgke
Do there exist free (as in freedom) compilers for the DSPs of TI?

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brandmeyer
There was some press material around that, as well as some preliminary support
in the Sourcery toolchain back around the 2010-2012 timeframe. But I haven't
heard anything about that effort lately, and I think that it has stalled.

