
3D Xpoint memory: Faster-than-flash storage unveiled - Sami_Lehtinen
http://www.bbc.com/news/technology-33675734
======
mmf
I did research in the field from 2008 to 2013. The claims are always the same:
faster than flash, denser than dram, lower power than both.

Here's how to spot BS: first, the density claims are immaterial until they
prove yield at a technology node same as dram's today. There are multiple
billions investment between 180nm and high yield (and low mask count) 2xnm, no
matter how cool is the new memory technology.

Second, speed claims must be explicitly about latency: flash bandwidth is as
large as you want it, latency is ~100us (read). Even so, the moment anybody
claims that latency is faster than Dram, you know they're feeding the hype and
lying to you: dram latency does not depend on the memory technology, rather it
depends on the array size. So an 8Gb chip of any memory technology that is
fast enough, is likely to be just as fast as dram.

Third: power consumption. Dram's active power is as low as it gets, the memory
cell in particular stores information with really little energy. The array
interconnect and circuitry consume most energy and a different memory
technology won't change that.

~~~
russdill
Actually you should be taking the claims very seriously. This has been an area
Micron has been researching for decades. They've had a patent on the memory
cell for about 11 years now (US6777705). Phase change memory has for a very
long time been one of those just over the horizon technologies, but Micron has
perfected it well enough to compete with NAND and partnered with Intel to
bring it to market.

This isn't something that appeared out of nowhere. Take a look at this
presentation:

[https://www.micron.com/~/media/documents/products/presentati...](https://www.micron.com/~/media/documents/products/presentation/gatwood_current_emerging_memory_landscape_fms2011_final.pdf)

Page 20 starts the section on "3-D Cross-Point Memory". They even have a 64Mb
demonstrator on page 23, fabbed sometime before the 2011 Flash Memory Summit.

Additional info on 64Mb demonstrator:
[http://investors.micron.com/releasedetail.cfm?releaseid=4672...](http://investors.micron.com/releasedetail.cfm?releaseid=467247)

Additionally, in early 2014, they stopped selling PCM modules, stating that
"Micron's previous two generations of PCM process technologies are not
available for new designs or technology evaluation, as the company is focused
on developing a follow-on process to achieve lower cost per bit, lower power
and higher performance."

Job description details mentioning PCM, chalcogenides, and "cross point
technology":

[https://www.linkedin.com/jobs2/view/12292797?trk=job_view_si...](https://www.linkedin.com/jobs2/view/12292797?trk=job_view_similar_jobs)

And as far as process, as early as 2013 (2013 fall analyst conference
handouts), Micron had PCM on a 45nm process and was listing 2xnm as next node.
If they've gotten together with Intel and announced this, they have already
reached 2xnm and/or beyond or are certain in their capability to do so.

Because of the way flash memory is organized into pages and blocks, latency is
_very_ workload specific. Can you point out where anyone claimed it was better
than DRAM latency?, the BBC article says "DRAM chips are still faster than 3D
Xpoint, but the difference is much smaller than when compared with flash".

And power consumption. This is PCM. Power consumption by the array when not
being read/written is zero.

~~~
russdill
Forward looking article from June with tons of analysis
[http://seekingalpha.com/article/3253655-intel-and-micron-
the...](http://seekingalpha.com/article/3253655-intel-and-micron-the-purple-
swan)

~~~
throw1111
No, apparently it's not PCM.

>While they did not specifically state it, it looks to be phase change memory
( _edit_ at the Q&A Intel stated this is not Phase Change).

Source: [http://www.pcper.com/news/Storage/Breaking-Intel-and-
Micron-...](http://www.pcper.com/news/Storage/Breaking-Intel-and-Micron-
announce-3D-XPoint-Technology-1000x-Faster-NAND)

~~~
ncr100
The video presentation mentioned "resistive". I'm not a memory nerd. Does that
fact from their disclosure help at all narrow what this type of memory can be
best categorized as?

[https://intel-micron-webcast.intel.com/webcast](https://intel-micron-
webcast.intel.com/webcast)

~~~
russdill
There is an entire family of memory elements who's resistance is modified in
order to store data. RRAM/ReRAM, CBRAM, PCM, MRAM, as well as many others.

~~~
dooptroop
I suppose "resistive" in this context relates to the method used to read the
memory, not so much how this change of resistance is implemented.

------
tmd83
The biggest thing that just came to my mind is for durable storage. I think I
can some problem at work radically differently and much simpler if I had this
available in 10s of GB.

How? Because its bit addressable and persistent. Together this makes it much
simpler to implement some durable storage . We don't need the log structure
good for NAND block erase issue. We don't need to worry about the flush cost
compared to HDD (and this ones even faster than NAND). It would be simple to
batch write the data to a slower storage if the Xpoint memory fills up.

You can design databases that keep the hot data in memory and merge the result
with older disk storage and this would allow a lot of batching for efficient
processing and storage. But given its a database/transaction you need
durability and that makes thing that much complicated. There are still lots of
problem to solve when you cross the limit of a single machine but the single
machine limit can get a lot larger for a lot of problems.

~~~
wtallis
They're claiming three orders of magnitude faster than NAND and three orders
of magnitude more durable than NAND, which means you'll still need wear
leveling to get it to last for several years, but you apparently won't have
the complexity of erase blocks being much larger than writable page size.

I do wonder how much it would be slowed down by the kinds of sophisticated
error correction SSDs are now relying on.

~~~
rosser
"Bit-addressable". I don't think this suffers from the same issues that NAND
does with successive writes. The other articles I'm seeing after a quick
search also suggest a three order of magnitude increase in write endurance.

~~~
wtallis
Yes, if you read what I wrote I mentioned the three orders of magnitude
increase in write endurance as compared with NAND. But when paired with the
three orders of magnitude increase in performance, that means it takes the
same number of hours to burn it out. And a NAND device without wear leveling
can be burned out in less than a day of heavy use.

Bit addressability has absolutely nothing to do with endurance. NOR flash is
bit addressable but suffers from the same endurance limitations as NAND,
because they're fundamentally the same kind of memory cell, just connected
differently.

~~~
davrosthedalek
The thing about bit addressability is not completely true. If you can address
memory only in pages, you can have quite a large write amplification,
depending on the access pattern. A single byte written may count as $PAGESIZE
"written data".

~~~
wtallis
A lack of bit addressability means that hammering one bit would burn out a
whole word/page, but it doesn't affect how many cycles it takes to reach that
burn-out point, unless you've got wear leveling.

In practice, if you burn out any one bit, you need to retire a chunk of the
array at least as large as a cache line. And it's not likely that you'll
actually be able to directly hammer a single bit, because the endurance is
still low enough to require ECC.

------
Animats
So what do we do with it?

We have two models of storage - volatile working storage, and things that
simulate disk drives. It's not clear what to do with persistent randomly
addressable storage at DRAM speed. Having to go through an OS and a file
system to access a few bytes kills the performance advantage of such devices.
Making the device look like RAM makes it too easy to mess up. We need
something in between, probably with processor support to allow controlled
access without going through the OS for each access.

The great thing about RAM being volatile is that you can reboot and clean up
your mess. With persistent storage, things can go gradually downhill.

~~~
Someone
Use the MMU to keep the fast non-volatile RAM out of both application and
kernel memory, put a traditional RAM disk file system on the fast non-volatile
RAM, and let mmap truly map blocks of files into address spaces, instead of
demand-paging it in.

That probably is not the best one can do, but it is simple, and may be fairly
easy to get ‘right’ if you put the code handling the file system part into a
secondary kernel address space. That keeps the part that can mess up the file
system’s metadata small.

~~~
stellarhopper
DAX, which is already in new kernels, provides something like this.

[https://lwn.net/Articles/610174/](https://lwn.net/Articles/610174/)

------
anotherangrydev
Always the same thing.

>1000X faster, 1000X cheaper!

Then "No, you can't buy one right now, but you will be able to do it "soon".
And, no it won't actually be 1000X faster neither 1000X cheaper because blah
blah blah..."

~~~
DasIch
They explicitly mention that they are going to release it next year. Not
exactly when next year but it's clear enough of a statement that it will be a
public failure, if they don't come out with it.

I think that's sufficient to not put it into the vaporware category.

~~~
anotherangrydev
Over the years I have come to realize that unless I can buy something in the
nearest BestBuy/Amazon, it is vapor. And also, until then, I would know how
much cheaper and better performant it actually is.

~~~
yokohama11
It's an official press release from Intel and Micron and the release says that
they've begun production, not that they just got it working in a lab.

Performance questions are more valid.

------
adsr
I hope someone will give a push behind MRAM which seems like a more
interesting option imo.

 _MRAM has similar performance to SRAM, similar density to DRAM but much lower
power consumption than DRAM, and is much faster and suffers no degradation
over time in comparison to flash memory. It is this combination of features
that some suggest makes it the “universal memory”, able to replace SRAM, DRAM,
EEPROM, and flash._

[https://en.wikipedia.org/wiki/Magnetoresistive_random-
access...](https://en.wikipedia.org/wiki/Magnetoresistive_random-
access_memory#Overall)

~~~
aidenn0
I'd like to see a source for the "similar density to DRAM" my understanding is
that it's an 8F2 footprint, and scaling it down to small process nodes is
still problematic, even with spin-torque transfer.

All that being said, there are people who make the exact same claims about
RRAM as you quote for MRAM, which 3d-xpoint appears to be.

Also note that you can buy MRAM parts right now, which are replacements for
battery-backed SRAM, and are more radiation resistant than SRAM. Densities are
fairly low though.

~~~
the8472
> my understanding is that it's an 8F2 footprint

Where does that come from? From everything I've read is that its structure is
fairly analogous to DRAM, "simply" replacing the capacitor with the magnetic
tunnel junction, which has its component layers stacked vertically, thus not
really taking up any extra space.

> scaling it down to small process nodes is still problematic, even with spin-
> torque transfer.

yeah, that's the main gist I'm getting too from following the news.

> people who make the exact same claims about RRAM as you quote for MRAM,
> which 3d-xpoint appears to be.

At least the xpoint incarnation still seems to be slower than DRAM according
to that article, while MRAM is being offered as SRAM/battery-backed DRAM drop-
in replacement.

~~~
aidenn0
>> my understanding is that it's an 8F2 footprint

> Where does that come from? From everything I've read is that its structure
> is fairly analogous to DRAM, "simply" replacing the capacitor with the
> magnetic tunnel junction, which has its component layers stacked vertically,
> thus not really taking up any extra space.

I did some searching; older references show an 8-12F2 size, for e.g. the
Everspin parts. Grandis claims a 6F2 size which is indeed comparable to DRAM.

>> people who make the exact same claims about RRAM as you quote for MRAM,
which 3d-xpoint appears to be.

> At least the xpoint incarnation still seems to be slower than DRAM according
> to that article, while MRAM is being offered as SRAM/battery-backed DRAM
> drop-in replacement.

Right, the product they are claiming they will manufacture next year is slower
than DRAM and less dense than flash. (Frustratingly I couldn't find a
reference for if they are talking about latency or throughput when they say
"slower"; it makes a big difference for which applications will be hurt by the
performance mismatch).

However, there doesn't appear (yet) to be a fundamental reason why resistive
ram must always be slower than DRAM, nor a fundamental reason why they
couldn't do MLC tricks with it, so you can't say all RRAM will be slower than
DRAM and less dense than NAND.

------
listic
Looks like this news item is made up from recent Intel's press release [1] and
quite a bit of hand-waving. Take, for example, a claim that 'it would
radically increase the number of people that could be supported for the same
price'. We already have E7 series Xeons that support up to 1.5TB of RAM [2]
(is it per socket? there can be up to 8 sockets per server) At that point,
surely we would be constrained by processing and I/O, not RAM.

[1]
[http://newsroom.intel.com/community/intel_newsroom/blog/2015...](http://newsroom.intel.com/community/intel_newsroom/blog/2015/07/28/intel-
and-micron-produce-breakthrough-memory-technology)

[2] [http://ark.intel.com/products/84685/Intel-Xeon-
Processor-E7-...](http://ark.intel.com/products/84685/Intel-Xeon-
Processor-E7-8890-v3-45M-Cache-2_50-GHz)

------
minthd
A guess: this uses memristors(i.e. rram).

crossbar is a startup in the field, their site gives plenty of details about
the tech.

[http://www.crossbar-inc.com/](http://www.crossbar-inc.com/)

~~~
russdill
No, this is not memristors (unless you consider PCM to be a memristor) and it
has no relation to crossbar-inc.com. This is phase change memory.

[https://www.google.com/search?q=site%3Amicron.com+%22cross-p...](https://www.google.com/search?q=site%3Amicron.com+%22cross-
point%22+memory)

------
Splendor
So this is essentially persistent DRAM?

~~~
nick-parker
The article mentions:

>By contrast, 3D XPoint works by changing the properties of the material that
makes up its memory cells to either having a high resistance to electricity to
represent a one or a low resistance to represent a zero.

Which sounds a lot like memristors:
[https://en.wikipedia.org/wiki/Memristor](https://en.wikipedia.org/wiki/Memristor)
to me. If it's memristor memory, the main advantages are that it's cheap, uses
hugely less power than flash, takes up less space, and has far lower
latencies.

We're probably a long ways from replacing DRAM with memristors because it's
still much higher latency, but if this stuff scales up well you could do
something like put the whole page file on it and get even faster loads than
current top of the line SSDs.

~~~
digikata
The press release seems to be intentionally silent on the actual memory cell
technology. Another possible tech the cell might be based upon is some variant
of Nano-RAM.

[https://en.wikipedia.org/wiki/Nano-RAM](https://en.wikipedia.org/wiki/Nano-
RAM)

------
emmanueloga_
"At that point in time, there was an 8:1 price/GB differential between the 512
GB SSDs and the 500 GB HDDs. On the smaller drives, the ratio was 4:1." [1]

If anything I'm hoping the introduction of a competing new technology will
make higher capacity SSDs cheaper.

1: [http://www.zetta.net/blog/ssds-replace-
hdds/](http://www.zetta.net/blog/ssds-replace-hdds/)

------
kristianp
This article is so thin on details.

"3D XPoint works by changing the properties of the material that makes up its
memory cells to either having a high resistance to electricity to represent a
one or a low resistance to represent a zero."

How does it do that?

~~~
wmf
The BBC isn't EE Times and they're never going to be. Also, Intel is going out
of their way to avoid providing many details, so in this case it isn't the
press who's dumbing it down.

------
rasz_pl
Dear Micron, brace for a mother of all patent lawsuits from HP.

~~~
assface
> Dear Micron, brace for a mother of all patent lawsuits from HP.

Ignore this person. They don't know what they are talking about.

This is phase-change memory. It's been on everyone's radar for the last
decade. HP is pushing their titanium oxide memristors. That's a completely
different technology.

~~~
throw1111
No, apparently it's not PCM.

>While they did not specifically state it, it looks to be phase change memory
(edit at the Q&A Intel stated this is not Phase Change).

Source: [http://www.pcper.com/news/Storage/Breaking-Intel-and-
Micron-...](http://www.pcper.com/news/Storage/Breaking-Intel-and-Micron-
announce-3D-XPoint-Technology-1000x-Faster-NAND)

------
higherpurpose
I assume there are some other disadvantages besides just a high price compared
to either DRAM or SSD storage. What are they?

~~~
DasIch
It appears to be slower than DRAM, so it's not going to be a sufficient
replacement. I also see no indication of how much storage it actually offers.
The range between RAM and SSDs isn't that large and I think it's going to be a
huge difference whether they can offer 16GB, 32GB or even 64GB at an
affordable price.

For a lot of users 16GB might not be worthwhile, 64GB might actually allow
some people to not use a SSD at all, so it I think they will have to provide
32GB of storage. That seems obvious enough that the fact it's not stated in
the article seems somewhat concerning.

~~~
wtallis
They're promising the first chip to be 128Gb, which is where MLC flash is
right now. But their die size looks a lot larger than MLC.

~~~
DasIch
Interesting. At 128GB it's definitely practical to put your system partition
and applications on it. If you rely heavily on cloud services that would be
more than sufficient for most people and even if it isn't you could add an SSD
for music and videos.

If they release it next year and it turns out well, I can certainly see Apple
pulling such a move for the MacBook (Air).

~~~
wtallis
128Gb, not 128GB. You still need quite a few chips to build a usefully large
drive.

~~~
davrosthedalek
128Gb is only a small factor below state-of-the-art flash chips, if at all. I
think 3d NAND drives it up to 384 Gbit/die. Don't know about the die size
though.

------
fahim305
Samsung had similar claims about v-nand/3D-nand, which they released on their
850 Pro series

~~~
kken
Did they claim it was magnitudes faster and 1000x more durable than NAND? I
think not, since it is still the same concept...

