
Rv8: a high performance RISC-V to x86 binary translator [pdf] - ingve
https://carrv.github.io/papers/clark-rv8-carrv2017.pdf
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dmitrygr
But...why? X86 to riscv could at least be claimed to be useful (run legacy
soft). There is ZERO riscv software at all (and thus zero closed source riscv
software).

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legulere
From the introduction:

Given Intel’s and AMD’s access to the latest process nodes, 4+ GHz clock
speeds, superscalar execution, several dozen cores and hundreds of GB of
memory in a server, a near native speed RISC-V binary translator is likely to
be the fastest RISC-V implementation and most practical build environment for
things such as operating system distributions for some years to come.

~~~
dmitrygr
That also explains why nobody should spend time making riscv software right
now - no chance of competitive speeds with Intel/AMD.

~~~
IshKebab
I believe it is competing initially with ARM. There are already RISC-V chips
that are competitive with Cortex M4 and similar.

~~~
dmitrygr
Well, there are designs that _claim_ to be. They are neither ordereable in
quantities of 100,000+ nor do they include any peripherals or even built-in
flash.

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erichocean
Anyone know of a similar binary translator for RISC-V to ARM?

~~~
_chris_
Compile RISC-V QEMU or RISC-V Spike simulator on ARM?

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alkoumpa
if only it wasn't that expensive to get a license for x86

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snvzz
x86 isn't that good. RISC-V has similar code density as amd64 while being
fairly simpler. There's not much appeal to x86 as an ISA, other than for
running legacy software.

~~~
pantalaimon
running 'legacy software' is for most use cases probably the most important
feature.

~~~
snvzz
Most "legacy software" can be rebuilt from source code. For software where the
sources aren't available, there's only a small subset where performance is the
main priority. The rest can be handled through emulation.

