
Random access memory (2016) - bryanrasmussen
http://www.rlfbckr.org/work/random-access-memory/
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hengheng
This is not random access; the latency depends on the position of the
read/write head over the spinning platter. Other analogies may be more apt.

Also I guess they could have just as well built that with a Pick and Place
machine out of an electronics manufacturing company, but I guess UdK has an
emphasis on things being hand-made and looking artsy.

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TheSpiceIsLife
It is random access because the device doesn't have to touch every grain of
sand on the way to the one it intends to deal with next.

It's very similar to a spinning-platter hard drive: latency depends on
rotational velocity of the platter and radial velocity of the read/write head.
That the latency is quite high in this device doesn't make it any less random-
access.

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lanna
> It is random access because the device doesn't have to touch every grain of
> sand on the way to the one it intends to deal with next.

what you described is called "sequential access"

> It's very similar to a spinning-platter hard drive: latency depends on
> rotational velocity of the platter and radial velocity of the read/write
> head.

hard drives & etc. are called "direct access"

> That the latency is quite high in this device doesn't make it any less
> random-access.

the problem is not that the latency is high but that the latency varies.

from wikipedia: "A random-access memory device allows data items to be read or
written in almost the same amount of time irrespective of the physical
location of data inside the memory. In contrast, with other direct-access data
storage media such as hard disks, CD-RWs, DVD-RWs and the older drum memory,
the time required to read and write data items varies significantly depending
on their physical locations on the recording medium, due to mechanical
limitations such as media rotation speeds and arm movement."
[https://en.wikipedia.org/wiki/Random-
access_memory](https://en.wikipedia.org/wiki/Random-access_memory)

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dfox
On the other hand, latency of DRAM also depends on the physical location of
data accessed (precharge, bank selection...). But for DRAM case it only
depends on sequence of previous operations and does not change with wall time,
for direct-access media it changes with time.

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peter_d_sherman
Utterly brilliant! Anyone studying computer engineering should understand that
Turing Machines exist outside of electricity, silicon and logic gates. This
should be the first lesson of the first class of any computer engineering
course.

~~~
0x0
Your comment made me think of this project that used water to build logic
gates and half adders:
[http://www.blikstein.com/paulo/projects/project_water.html](http://www.blikstein.com/paulo/projects/project_water.html)

~~~
amelius
Except his gates are not regenerative, meaning they lose their function after
a few stages.

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yorwba
Are you sure? So long as the water stays in the system, you should be able to
chain as many as you want, since only the boolean "water flowing/no water"
matters.

~~~
amelius
Here's one point where it fails. The gates are not perfect: the output of a
gate needs to stabilize. During this stabilization, the gate is leaking water
in the wrong output pipe.

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Ecco
I'd be curious to know how many bits this fun memory stores :-)

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cosinetau
I love how soothing that sound is. I would love to have it going while working
in a library study hall or something.

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elvinyung
Relevant xkcd: [https://xkcd.com/505/](https://xkcd.com/505/)

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dingo_bat
Isn't this what Greg Egan talks about when he explains his "dust theory"?

[http://www.gregegan.net/PERMUTATION/FAQ/FAQ.html](http://www.gregegan.net/PERMUTATION/FAQ/FAQ.html)

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s-berwick
Have just looked at some of his other work. Would love to buy a print!

