
The Tyranny of the Clock (2012) [pdf] - evilops
http://www.eng.auburn.edu/~uguin/teaching/READING/E6200/Sutherland_Tyranny_o_Clock.pdf
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ultrafilter
The author's more recent work is here:

[http://arc.cecs.pdx.edu/publications](http://arc.cecs.pdx.edu/publications)

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vinutheraj
Related talk by the author (Ivan Sutherland):
[https://www.youtube.com/watch?v=jR9pAaQlVRc](https://www.youtube.com/watch?v=jR9pAaQlVRc)

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jimnotgym
When I read the title I was reminded of this

[https://youtu.be/tVT2Xi1kwx0](https://youtu.be/tVT2Xi1kwx0)

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oystercatcher
in verilog there is a distinction between asynchronous combinatorial logic and
synchronous sequential logic

wires are treated as transmission lines

