
Radio-Astronomical Imaging: FPGAs vs. GPUs (2019) [pdf] - zdw
https://www.astron.nl/~romein/papers/EuroPar-19/EuroPar-19.pdf
======
TomVDB
They are comparing a lower end $200 GPU from early 2014 against a higher end
$5000 FPGA board from 2016.

That doesn’t make everything irrelevant, but it’s definitely a weird to
publish a paper about this in 2019.

~~~
pinewurst
And that lower end GPU is still notably better performing.

~~~
lnsru
They didn’t implement it in proper VHDL/Verilog. They used OpenCL compiler,
what is a great waste of resources. Of course, this way for comparison was
quick.

Good solution would be high level synthesis from Matlab/Python/C instead of
blindly replicating OpenCL kernels designed for GPU. Might work even better on
less fancy FPGA than Arria 10.

~~~
llukas
"The source code for the FPGA imager is highly different from the GPU
code.This is mostly due to the different programming models: with FPGAs, one
buildsa dataflow pipeline, while GPU code is imperative."

Please explain how they used OpenCL kernels designed for GPU.

~~~
enos_feedler
You can think of OpenCL kernels (or any imperative sequence of low-level
operations) as data flowing through math operations. Normally, we leverage a
single set of math circuits to perform all of these operations in sequence,
and orchestrate the data flow through a register file. You could imagine
removing the register file and instantiating an actual circuit that represents
the data flow of the program itself. This creates more opportunity for
pipelining, which should be plentiful in a highly data parallel computation.
The issue with FPGA is they are clocked lower and are not very dense, so the
tradeoff is generally not worth it.

~~~
llukas
Are you saying that even with OpenCL kernels tailored for FPGA we get subpar
results? (can belive that compilers do subpar job even on GPU)

~~~
enos_feedler
Yes, I don't think it's an issue with the compiler. The FPGA approach requires
a flexible fabric that just has lot's of overhead to give it programmability
compared to an ASIC. For an FPGA to have value, you _really_ need to leverage
it's programmability. Emulating an ASIC design for verification and testing is
a good use case.

------
llukas
Paper mentions SKA has specific requirements but doesn't really go into
details.

If you put radiotelescope in the middle of nowhere and you need to build your
own powerplant and deal with logistics of transporting then you care about
power efficiency _and_ robustness.

