
32-bit homebrew CPU using 74' series logic - peter_d_sherman
http://hackaday.io/project/18491-worlds-first-32-bit-homebrew-cpu
======
PhilWright
Hackaday project owner here...

The idea of the project is the fun of playing around with electronics,
something I have not done before, and trying to understand everything about a
real computer. Starting with the CPU and then building it out with a simple
graphics card. After that create an assembler/compiler for RISC-V and write a
small OS. Yes, all of these will be relatively simple and not of a commercial
standard, but building a machine and watching it run with all the hardware and
software written from scratch is the longer term goal.

~~~
emcrazyone
cool project.. I'm curious about your experience working with China PCB
manufacturer. The costs seem low from my experience ($10 for 10 boards + $25
shipping). Was the quality there? How fast was the shipping? Did you attempt
any homebrew PCB etching?

~~~
analog31
I'm not the author, but I've etched my own boards. My graduate thesis project
contained a couple dozen homebrew boards by the time all was said and done.

I used a photo-resist process based on transparencies that I made in the
department Xerox machine.

The biggest improvement in moving to real manufactured boards was plated-
through holes. For that reason alone, I wouldn't go back. Not only are boards
easier to route with PTH's, but they are also more robust -- it's harder to
lift a pad off the board when removing a component.

Solder mask is a boon as well, especially for surface mount.

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tzs
I took the MITx MOOC version of MIT's 6.004 (Computation Structures) class. In
that class students design and implement in logic gate level simulator a
32-bit RISC CPU.

I was going to try to build it out of 74' series logic as a summer project
last summer. Then I did a count of the gates I was using. In the following, a
number after a gate type means the number of inputs. My gate count:

    
    
      295 AND2
        8 AND3
        3 NOR2
        4 OR2
       96 OR3
       20 OR4
      226 XOR2
        6 NOT
      563 MUX2
      161 MUX4
       32 D FLIP FLOPS
    

I'm not including memory for the registers. I would probably not have tried to
make that out of 74' series logic.

In terms of chips, it is something like

    
    
      140 4xMUX2
       75 4xAND2
       81 2xMUX2
       55 4xXOR2
    

plus a few more.

The project pretty much died at that point.

I could cut a lot of those out by moving some functions from hardware to
software. My design includes a shifter than can left or right, logical or
arithmetic shift 1 to 32 bits in one cycle. 353 of the MUX2s are involved in
that.

I could take that out, add a much simpler unit that can only do logical right
shift by 1, add a new shift instruction that uses that simpler shifter, and
make the current shift instruction into illegal instructions. They would then
trap, and the illegal instruction handler could emulate the missing
instructions.

Still too many chips after that, though.

I may still build it someday, but rather than making it out of real chips I'll
use it as an excuse to learn about FPGAs.

If any of this seems interesting, I highly recommend 6.004 at MITx.

~~~
userbinator
_In that class students design and implement in logic gate level simulator a
32-bit RISC CPU._

Is that an euphemism to avoid saying "MIPS"? ;-)

One way to really cut down on hardware (and speed) is to use a bit-serial
design, as found on some minicomputers in the 70s. Memory elements like
registers still need the full width, but by processing only 1 bit at a time,
many of the other components in the datapath can be reduced by a factor of 32.
You can also get left and right shifts for "free" since that's intrinsic in
the design. Another strategy is to use microcode to break down instructions
even further, e.g. reuse the ALU to do address calculations and incrementing
the instruction pointer.

~~~
Cursuviam
It's an ISA called Beta. It's based off of Alpha. See specification:
[https://6004.mit.edu/handouts/beta.pdf](https://6004.mit.edu/handouts/beta.pdf).

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dbcurtis
I'm lucky enough to say this was my day job in the 1980's. The sad thing is
that today the TTL catalog is much thinner, so it is actually harder to do
today than it was then. I'm happy to see RISC-V getting so much traction with
serious builders. It seems like the most viable path to hardware freedom right
now.

~~~
bogomipz
What do you mean by the TTL catalog is much thinner?

~~~
PhilWright
TTL = transistor transistor logic

This is the technology in the common 74' series integrated circuits that
became popular in the late 1960's and 1970's. You can get basic IC's that
perform AND, NOT, XOR operations but also more complex IC's that perform as
multiplexors, buffers, registers and so forth. You can find these in computers
like the PDP or VAX series machines.

They are not used as much today and so less of them are still manufactured.

~~~
dom0
Although when we say TTL/74 today, usually HCMOS is meant. Real TTL 7400
series parts are, I think, all EOL and have been for many years.

~~~
Gracana
TI still makes a lot of them, but you have to mix and match series if you want
broad coverage of the device family. This document is a very helpful overview
of their range and how they interoperate:
[http://www.ti.com/lit/sg/sdyu001aa/sdyu001aa.pdf](http://www.ti.com/lit/sg/sdyu001aa/sdyu001aa.pdf)

(fwiw it sounds like you know what you're talking about; I just wanted to
share this info for anyone else who might be interested)

------
userbinator
_This is important as any 32 bit design is already going to be a big project,
so lets not make it impossible by going for something like the CISC of the
80386!_

From a practical standpoint, going with 32-bit over 16-bit means not much more
than making the datapath twice as wide --- which increases area but not actual
complexity per se. And seeing a discrete i386 would actually be pretty
interesting, especially if implemented on top of this one as an x86-to-RISCV
uop-based decoder like the original P5.

Here's another well-known one, although it's 16-bit and uses a custom ISA (but
its creator ported a whole OS to it):

[http://www.homebrewcpu.com/](http://www.homebrewcpu.com/)

~~~
robzyb
> From a practical standpoint, going with 32-bit over 16-bit means not much
> more than making the datapath twice as wide

Actually, that is more true from a theoretical standpoint.

From a practical standpoint you have twice as many traces to fit on your board
and route, you have more chips, higher power requirement, etc.

~~~
Gracana
So very true. I have an ongoing 32-bit computer project using a simple MPU and
RAM/ROM/peripherals attached via a standard bus, and oh my god is that ever a
lot of signals. It's not as bad if you use big device packages, but at higher
speeds and with now-common BGA parts, it is damn hard to route all those
signals with the processes that are easily available to hobbyists (like OSH
Park's four layer board service).

~~~
userbinator
It's unfortunate that hobbyist PCB processes haven't increased much in layer
count vs, price even after several decades; the original IBM PC (8-bit
data/16-bit address, multiplexed), if my sources are accurate, used a 4-layer
motherboard. 386/486-era motherboards with real 32-bit busses, already had 6-8
layers. It seems cost goes up more than the multiple of the layer count --- a
10-layer board costs more than 5x a 2-layer one.

~~~
Gracana
I feel like there has been considerable improvement in the hobbyist PCB
scene... Prices, process size, and turnaround time for low layer count boards
have come way down. But still, like you say, >4 layer stuff gets crazy
expensive fast. Maybe easy access to higher layer counts will be the next
milestone.

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cmrdporcupine
Last time I was playing with 74 series chips I kept wishing there was a
Verilog or VHDL library with impementations of all the common 74 series chips
(complete with the proper pinouts and timings etc), so one could do a full
working simulation of the circuit before going ahead and breadboarding it or
laying out a PCB.

~~~
SAI_Peregrinus
It's not VHDL or Verilog, but SPICE tools are what you are looking for.

LTSpice is free, and quite good:
[http://www.linear.com/designtools/software/#LTspice](http://www.linear.com/designtools/software/#LTspice)

A good tutorial page:
[http://www.simonbramble.co.uk/lt_spice/ltspice_lt_spice.htm](http://www.simonbramble.co.uk/lt_spice/ltspice_lt_spice.htm)

LTWiki page on component libraries, Bordodynov's library in particular
contains lots of 74HC and 74HCT series chips:
[http://ltwiki.org/?title=Components_Library](http://ltwiki.org/?title=Components_Library)

~~~
dbcurtis
Wow. No, what he wants is a logic similator, not a circuit simulator. Spice is
a circuit simulator.

In any case, it is libraries where the rubber meets the road. A logic
simulator is a programming homework assignment. Enough libraries to simulate a
CPU is months of effort.

~~~
p1esk
Actually, he does need Spice if he wants to do layout, and worries about
timings.

~~~
dbcurtis
Gah! Who uses Spice for pcb layout? Logic timing anslysis is done with
topology tracing tools and pcb simulation is done with transmission line
analysis tools.

~~~
p1esk
What are those tools and are they free?

------
codebook
Appraise for the effort. But I do not know why anybody did this kind of
tedious job. Isn't it enough to do with Verilog / VHDL to fully understand
basic architecture of CPU?

~~~
analog31
In my view, it depends on what you get your pleasure from. Taking something
from model to metal invokes a certain crazy satisfaction that's hard to
describe. I've built things that didn't really need to be built, for this
reason.

~~~
mysterydip
Seems similar to ship-in-a-bottle in the age of 3d modeling/painting/printing
:)

~~~
dom0
You can still do it old-style with no custom-made PC boards ... I actually
have quite a few protoboards made with a wiring pencil. No CPU/computer
though. Most complex thing is probably a serial-to-NATO (alphabet/language)
board :)

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dnotq
> So creating it as a big breadboard project is out the window. No. We need to
> create some actual proper PCB designs that can then be connected together in
> a modular fashion.

Before you write off prototyping large sections on breadboards, I highly
recommend you take a look at the Vulcan-74:

[http://forum.6502.org/viewtopic.php?f=4&t=3329](http://forum.6502.org/viewtopic.php?f=4&t=3329)

~~~
cmrdporcupine
I've followed that thread for a long time. He keeps changing direction, which
is unfortunate. His breadboarding technique is quite amazing -- I tried
copying his approach and my fingers just can't do it :-)

------
systemshacker
Building a cpu using 74 series logic was a required project in our
undergraduate micro-architecture course. It was a fun time debugging the bread
boards! First time we learnt the fact that voltage at one end of bread board
to the other drops due to resistance so 5V gates do not work if power supply
is not connected close enough.

~~~
greglindahl
I know a startup that wasted $10mm (and precious time to market) because of a
similar issue. They wish they'd learned this lesson much earlier!

------
pacaro
Would it be worth faking parts you haven't gotten to yet? Have boards with the
correct connectors for higher level components and simulate using off the
shelf microcontrollers.

This would allow system level testing, and get to a working device sooner.
Over time migrate everything to TTL

~~~
Gracana
Quinn Dunki did something like that when building her "Veronica" 68k computer.
IIRC the VGA output remains AVR-based. Seems like a good way to go, provided
you don't get bogged down in timing constraints.

If you just need to test a unit (and don't need full functionality), a nice
logic analyzer works well... I have an HP 16700A with pattern generator, which
I can use to simulate just about anything (more or less.. sometimes it's a bit
cumbersome to use.)

------
ryao
I am not part of the FSF, but this probably would qualify for the FSF's
certified device program if the full blue prints were made available.

~~~
BuuQu9hu
Unlikely, since the designs are only editable in the proprietary Eagle EDA
tool.

~~~
lucaspiller
What's the best free alternative to Eagle?

~~~
PhilWright
Eagle is free as long as your boards are limited to a maximum of 100m x 80m.

~~~
dfox
You mean mm.

And also, as long as you use only two layers, which given how cheap are
4-layer boards from china is pretty significant limitation, especially for
project of this kind.

~~~
majewsky
Makes me wanna see a 100m x 80m board in real life. What would that be? Maybe
a Core i3 in TTL? :)

~~~
unwind
More, I think.

This: [http://www.embedded.com/electronics-blogs/break-
points/44311...](http://www.embedded.com/electronics-blogs/break-
points/4431173/TTL-turns-50--more-or-less--in-2014-) shows a TTL era computer
board, which seems to cram in about 300 packages in 15x15 inches.

Assuming each package is at most 500 gate (medium-scale integration) with 5
transistors/gate, that's 2,500 transistors per package.

So in 225 square inches we'd get 300*2500 = 750,000 transistors.

The Core i7 "only" has 731 million, which converts to 975 of those giant
boards. But each such board is just 0.15 square meters, and in 100x50 meters
we can fit more than 33,000 of them, for billions of transistors.

Of course, the max clock would not be very impressive at this scale. :)

------
Limb
I actually just started breadboarding an 8-bit CPU inspired by Ben Eater's
project of the same nature [0]. The book he makes reference to "Digital
Computer Electronics" by Malvino provides plans for a complete 'Simple As
Possible' CPU using 74LS chips.

[0]
[https://www.youtube.com/playlist?list=PLowKtXNTBypGqImE405J2...](https://www.youtube.com/playlist?list=PLowKtXNTBypGqImE405J2565dvjafglHU)

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akavel
Can anybody estimate roughly how big can this end up physically, and how fast
it can get in clock Hz or (better?) ops Hz? Also, how many discrete components
it might take?

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digi_owl
I find myself wondering if the final result will be anything like the Xerox
Alto.

