
Verilog for Software Programmers - alain94040
https://en.wikibooks.org/wiki/Programmable_Logic/Verilog_for_Software_Programmers
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etep
The number one thing to know here:

In most programming languages, each statement is implicitly sequenced, unless
told otherwise (e.g. pthreads, or openmp)

In a hardware description language, each statement is concurrent with all
others, unless explicitly sequenced.

But this does not even begin to help, i.e. if this is truly for a beginner --
especially in light of the fact that verilog itself is laden with gotchas.

The approach taken by chisel:
[https://chisel.eecs.berkeley.edu](https://chisel.eecs.berkeley.edu) is imo a
good one. Each line of code in chisel adds a node to a DAG. The DAG describes
the connectivity of logic elements. Sequencing is of course handled as well,
so you can view your logic as a set of DAGs with registers in between.

