
UPDuino: a $9.99 FPGA - jamesbowman
https://tinyletter.com/jamesbowman/letters/upduino-a-9-99-fpga
======
chrisallick
"On board quality - I paid a High School/College kid in Sri Lanka to do the
board; I will give him your feedback." the most beautiful thing i'll read
today.

~~~
faitswulff
At once very cool and potentially very sad to me. Sad to think that skilled
engineers are being underpaid because they lost the geographic birthplace
lottery.

~~~
jjeaff
I pay some overseas developers way below the median faang salary, and yet,
their quality of life is likely much better than your average faang employee
due to the much lower cost of living.

In other words, they aren't making six figures and yet still sharing a 2
bedroom apartment with 6 other developers.

~~~
komali2
This was my grand scheme all along - after having a comically high quality of
life on 2k/month in Taipei as an English teacher, I moved back to the states
to learn frontend. Now I'm building out my resume and network so I can
eventually fuck off back to Taipei, work a couple contract roles, pull in a
cool ~4kish a month, and live like a king while having far more time for my
own projects.

It was inspired when me and my dirty, sweaty, budget beer-drinking buddies
were hanging out at a 7/11 with a foreign engineer we had just met. He said he
wanted to go to the club, we were like "dude cover is pretty expensive, let's
just drink our 50 cent beers." He did a quick count of us, then said "ok, I'll
pay for everyone's cover."

Rent was 250USD a month, 100mbps internet 20 USD... this on top of the fact
that you're getting nearly equal healthcare because all the doctors are US
school trained anyway, way better public transit (trains are automated! and
CLEAN!!). I mean, it's the dream.

~~~
pkaye
How do the doctors get US school trained yet can afford a lower income?
Medical school is quite expensive in the US. Do they get funding from their
government to learn abroad?

~~~
komali2
Sometimes, yea. There's tons of scholarships. Also exchange programs etc. But
it's a family oriented culture so oftentimes it's just the family pooling
resources. low cost of living doesn't necessarily mean low comparative income,
engineers can pull up to 60k USD yearly there which is a huge sum compared to
cost of living.

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yazan94
Can someone explain why someone would choose an FPGA over a standard
microprocessor? What advantages could this UPDuino have over an Arduino? Also,
how do ASIC's figure into this comparison?

My understanding is that microprocessors excel at executing logic using an
onboard general-purpose ALU sequentially and quickly.

On the other hand, an FPGA excels at doing a specified task as the hardware
(gates) are programmed/hooked up in a certain way to execute that one task.

ASIC's are processors that are designed from the factory to execute a specific
task (kind of like pre-programmed, non-reprogrammable FPGA's).

Can someone please fill in the gaps please? I have a general idea, but I'm not
sure I understand all the differences correctly.

~~~
phamilton
You are correct enough here. The interesting question is not how they are
different, but what the advantages are.

An FPGA is really good at doing a single task a ton of times. A microprocessor
is good at doing a lot of tasks a ton of times. And an ASIC is just a more
permanent and more efficient FPGA.

So when would I use an FPGA? Let me describe an example: Stream processing.

Let's say I have a stream of data. Like a camera producing a video feed. As
each frame of data comes in, we want to compare it to the previous frame and
take the average of the two values to create a blurring effect.

On a microprocessor we process each frame. We iterate over groups of pixels
one at a time, compare it to the value at the pixel in the previous frame and
divide by two. Our processing time is a function of the number of pixels we
want to look at. If we're lucky we have multiple cores so we can do work in
parallel. Maybe even do 32 groups of pixels in parallel on a ryzen or
something. But if we have a 1 megapixel image, we're going to still have to
visit ~30k pixels sequentially on each core and perform some math. We're
probably adding at least a few ms of lag on the feed. And if we're trying to
do any multitasking on this cpu, then we may not have very predictable
performance.

On an FPGA we approach the problem very differently. Instead of having
sequential logic for visiting each pixel, we have combinatorial logic.
Supposed each pixel came through on a different wire. That wire goes into a
component that holds the previous value for the pixel and outputs the average
of the current and previous value. We then take that output and rebuild the
video feed with it. On a 1 megapixel image, our unit of work is a single pixel
and we have concurrency of 1 million units. We add a cycle or two of lag,
which is negligible. Additionally, we have very predictable performance
because our computation executes in lock step with the system clock.

FPGA's are expensive (per unit cost) and aren't always the most efficient. An
ASIC will drop per unit cost and power requirements significantly but has a
large up front capital investment.

~~~
mrob
>That wire goes into a component that holds the previous value for the pixel

Wouldn't that need at least 24M flip-flops in the FPGA (assuming 8 bits per
channel color)? I don't think anybody makes one that big.

~~~
btashton
what was written is clearly a simplification, but outlines the high level
architecture differences. Say you want to do this with a 10 megapixel image,
clearly you are not going to fully parallelize that, but you could load the
whole thing into BRAM divide it up into 100 regions and itterate over that.
This also ignores that most FPGAs are not just a pile of flip-flops you wire
together, but instead have a whole pile of specialized blocks in addition to
look-up-tables.

------
syntaxing
All these new affordable FPGA are getting really tempting to learn more about
them. I've been debating for a while to get the TinyFPGA BX board from
Sparkfun. Though I don't have a specific application yet. Are FPGA used in
robotics often? Or is the response time so low (relatively) that it makes more
sense to stick with a uC?

Side note, this might seem like stupid question, but can anyone explain what
APIO[1] is (which TinyFPGA uses)? I'm kind of confused what it's used for.

[1] [https://github.com/FPGAwars/apio](https://github.com/FPGAwars/apio)

~~~
moftz
You aren't going to be able to build a super-fast CPU on an FPGA but there are
plenty of other tasks you could give it. You can build a processor for analyze
multiple sensors, looking for specific events that you could then feed to the
uC or setup a DSP pipeline to filter the sensor data to look for patterns. The
nice thing about an FPGA is that there is no interruption when it's running.
The uC might be trying to feed data over wifi to the controller station and
polling sensors/analyzing sensor data is going to bog things down really
quick. Another task for an FPGA would be to act as a switch for a network
within the robot. It would sit between all of the sensors/actuators and an
ethernet-enabled uC located elsewhere in the robot. The FPGA would read
command packets from the uC and translate tasks like "read temperature sensor
#5" or "turn 15 degrees" into specific impulses on the pins while also turning
sensor and feedback data into packets to send back to the uC. You could even
run video feeds from cameras back to the uC over gigabit if the FPGA supports
it. This way you can run a cheap, small uC to control things from a higher
level while the i/o-plentiful FPGA does all the heavy lifting at 100Mb/s
speeds.

~~~
syntaxing
Something like this sounds super interesting. Is it hard to get the FPGA to
talk the uC? I own the DSP book by Proakis/Manolakis, but I picked it up only
twice...so my understanding of DSP is pretty abysmal.

~~~
moftz
There are SPI, I2C, ethernet, and UART blocks that you can usually just drop
right into your design for communicating with external chips.

------
stefanpie
I wanted to get into FPGA programming recently after feeling confident
mastering my microcontroller skills and discovered that complex programmable
logic devices (CPDLs) can be a stepping stone to full on FPGA prototyping.
They somewhat of a similar high-level functional design and there are some
nice guides online to get started on some projects.

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funkaster
There's a v2[0] of the same board that includes a USB<->SPI to make it even
easier to program.

[0]: [http://gnarlygrey.atspace.cc/development-
platform.html#updui...](http://gnarlygrey.atspace.cc/development-
platform.html#upduino)

~~~
sowbug
Thank you for linking to at least one page on the company site. The
[https://tinyletter.com/](https://tinyletter.com/) article links to it only
very obscurely around an image. There are many normal links in the article, so
I assume the failure to link clearly to the product under discussion was just
an oversight.

------
spitfire
Can this run a RISC-V core?

It would be very nice to bring the cost of experimentation in CPU cores down
to something easily accessible to even students. In the same way that RPI
brought computing and hardware interfacing down to basically anyone who can
afford a cup of coffee.

~~~
eigenloss
[https://github.com/cliffordwolf/picorv32](https://github.com/cliffordwolf/picorv32)

~~~
baobrien
Also written by the same guy who did a large chunk of the open source
synthesis toolchain for the FPGA mentioned above.

------
bayesian_horse
A critical advantage of these new FPGA boards is not only are they at the same
price point like Arduino clones and many other common maker components, but
they are also small enough to be useful as permanent component in a project.

With earlier FPGA Learning boards, the designers tried to cram a ton of stuff
into them, usually a gazillion pins, leds, input devices and connectors. You
can't easily put that on a Raspberry Pi or Arduino.

------
pulse7
Almost the same FPGA (Lattice Semiconductor FPGA ICE5LP4K) has been found in
the iPhone 7:
[https://web.archive.org/web/20160916230725/http://www.chipwo...](https://web.archive.org/web/20160916230725/http://www.chipworks.com/about-
chipworks/overview/blog/apple-iphone-7-teardown)

------
bopbop
Is this powerful enough to run a NES? As in, can it run a 2mhz 6502 chip with
some extra space for the sound chip, etc?

~~~
danbruc
The FPGA seems to be a ICE40UP5K which has 5280 logic elements each
configurable to any Boolean function of up to four inputs plus a flip-flop to
store the result. Wikipedia gives two numbers for the transistor count of the
6502 namely 3,510 and 4,237 but both are smaller than the number of logic
elements so fitting a 6502 should be easily possible. The FPGA has an
integrated 48 MHz clock so a 2 MHz designs also seems quite achievable. I can
not tell whether the remaining logic elements, the memory, and the I/O blocks
are sufficient to build everything else because I know essentially nothing
about the NES. It seems at least not wildly implausible to me but memory might
become an issue because there is only about one megabit on the FPGA.

~~~
q3k
Remember that you also to implement need memory (the UP5K actually does have
quite a bit of SPRAM, though), a memory controller, a ROM, the NES PPU (which
was mixed signal) and that comparing transistors to LUT/DFFs is not really a
fair comparison (as transistor based logic is not immediately always
convertible to RTL logic, and that high-density FPGA designs are much more
tougher to route while meeting timing).

Finally, the UP5K is actually fairly slow (when it comes to routing timing)
compared to the iCE40 HX/LP, and especially compared to other, more modern
FPGAs. The iCE40 routing in general also tends to be underwhelming at high
density designs.

------
isoprophlex
How does one go about developing on an FPGA (i'm an absolute noob familiar
only with Arduinos and ESPs)

Are there any go-to IDEs that everyone uses? Resources/tutorials towards a
`blinkenlights 101` project that are especially useful?

Edit: thank you all for the very excellent answers! I'm going to lose so much
productivity over this!

~~~
ChuckMcM
The equivalent tooling for FPGA programming is starting with a high level
hardware description (typically Verilog or VHDL) then

\- synthesis -- this converts the text description from HDL into gates (fun
fact you can write valid HDL which cannot be synthesized into hardware)

\- place & route -- this takes what is essentially a schematic from the first
step and assigns it to resources within the FPGA. This is also where you
specify which pins on the FPGA you want to be connected to the schematic
outputs.

\- timing closure and simulation -- This is the process where the FPGA place
and route core is trying to either make your design fit in as few gates as
possible or run as fast as possible (these choices often conflict so you have
to prioritize one over the other)

\- bitstream generation -- This is where an often encrypted stream of bits are
generated such that if they are fed into the FPGA they will set all the
internal switches etc to realize the design you've put together.

\- programming/flashing -- most systems use JTAG to do this.

When I started doing FPGA designs the hardest part for me was to break the
notion of "software" when I was writing VHDL. You have to keep your head in
the 'one clock' every variable gets to change exactly once in this block.

~~~
FPGAhacker
Good write up. However, I think saying synthesis turns hdl into gates is
tangling with our digital design lingo.

Netlist is better, but to someone outside of digital design but with software
background, I think I would call it a textual listing of the gates of the
design and their interconnection. A graph.

~~~
ChuckMcM
I agree, and I struggled with calling out EDIF or just netlists. My choice was
that the OP was "absolute noob just figured out Arduino" level and so netlists
which are pretty obvious to anyone who has done schematic design are kind of a
foreign concept to software only folks. But everyone seems to "get" that an
FPGA dynamically wires together "gates" (even if they may be called LUTs,
CLUTs, CLBs, or ALAs internally).

One of the ways I've helped SW types understand FPGAs was to describe the
basic CLB as a subroutine that you program by setting very specific parameters
and it has an input of some number of bits and a "clock" bit, and outputs the
same number of bits. And the "program" is similar to the calling sequence of
all these subroutines tied together.

Then I start rattling off VHDL books to read :-)

~~~
FPGAhacker
Yeah, I didn’t really do any better. It just felt wrong to say gates at
synthesis when it’s still a file on a computer instead of something physical
like a transistor.

Although now that I said that, I guess with fpgas that is sort of always true.
Programming fpgas is the equivalent of sending a file via FTP. Nowadays at
least.

------
TomVDB
Word of warning: my UPDuino v2 (these have a USB connector so you don't need a
separate programmer) worked, but it heats up a lot immediately. I suspect a
short circuit somewhere due to bad soldering. Requests to have it replaced
were never answered.

~~~
FredFS456
At $10 shipped I'd just get a new one. I don't think there's any reasonable
expectation of support here.

~~~
TheAceOfHearts
Most companies will replace a faulty device with a new one or fix it if it's
broken due to manufacturing issues. Maybe the price should be increased a bit
to allow for further testing.

If you have an issue the solution shouldn't be to throw it away and buy a new
one, that's incredibly wasteful and it encourages bad behavior by the
manufacturer.

------
crankylinuxuser
Im interested in low cost FPGAs, like around the $5 range. My goal is to make
a closed loop stepper microcontroller.

Ive never did FPGA design. what's good resources to start reading to get
caught up with the basics? Figure I should ask those more in the know.. :)

~~~
sigstoat
if practicality is a concern at all, then you can get stm32's for about that
which will have significantly more power than you'll be able to cram into a $5
FPGA, and the development environment will actually be pleasant.

(or just buy them, there's at least one on crowd supply, another was on
kickstarter in the last couple years, etc)

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bayesian_horse
My complaint about this new breed of maker-level FPGA boards is that the
information on shipping is a bit sketchy. I believe most ship from the US (I
think one didn't even tell where from) and that often leads to hazzles with
customs etc. which I would prefer to know beforehand...

------
nategri
This is pretty great. I have been wanting to get into FPGA programming so it's
nice to know how low the "basement" price is for the essential equipment.

Can anyone else recommend any other cheap entry level boards?

~~~
tonysdg
Pretty much anything from Digilent. I've got an old Spartan6 board that has a
boatload of horsepower. If you want to get fancy, look at the Zedboard family
-- FPGA wrapped around ARM cores.

~~~
LeifCarrotson
I also recommend Digilent, but they are not bargain basement. They're
education targeted, often focused on the lab, rather than non-hobbyist R&D
boards, but not $10.

------
lichenwarp
this thread might be dead now but can someone please explain why an FPGA is
such a big deal, I always see them mentioned but just don't have an idea of
what they can be made into? Can anyone give project ideas of why it would be
better to use on FPGA? (not sarcasm, I'm genuinely curious)

