
TSMC’s Wafer Prices Revealed: 300mm Wafer at 5nm Is Nearly $17,000 - rbanffy
https://www.tomshardware.com/news/tsmcs-wafer-prices-revealed-300mm-wafer-at-5nm-is-nearly-dollar17000
======
ksec
Anandtech _should_ have an article with primary source instead of this
estimate. ( Assuming they are allow to publish it )

1\. It is no use discussing yield % without putting the die size. It is defect
density per cm2 that is the most important factor. ( Your yield percentage
change due to design and die size )

2\. 5nm defect density is better than 7nm comparing them in the same stage of
development. i.e Very Good.

3\. TSMC is actually open and transparent with their progress and metrics.
Both in Investor Meetings and Technical Forum. ( And with their business
partners.... something most other Foundry aren't doing as well )

4\. Most of these calculations in the comment are in BOM cost, which
completely ignores the Design Cost ( Billion ) and Research Cost, in terms of
Apple that is Architecture Cost, and IP Cost such IMG, FPGA ( Lattice ) etc
that are paid per unit. ( Edit: And testing, packaging cost, but it is
relatively small )

5\. Hopefully with these figures in mind, you will see how Qualcomm is
fighting hard to compete, considering they will have to sell it with at least
50% margin. ( And why Nvidia dont necessarily want to be in the Mobile SoC
market, as suggested in the ARM- Nivdia discussions previously )

6\. And then you should realise, how the ARM royalty portion is not an
important cost factor. ( As per _all_ ARM or RISC-V discussion on HN )

7\. You should also notice the trend of Wafer Pricing. Hopefully that will
finally shape your view on Moore's law.

~~~
starfallg
>ARM royalty portion is not an important cost factor

That's exactly the reason why Nvidia's pending acquisition of ARM is so
suspect. There's not much money to be made in ARM's business model hence it
really only makes sense if they plan on exploiting the synergy of ARM + Nvidia
tech in a way that only ownership of the company allows them to.

~~~
baybal2
No, an option to hike royalties is very much on the table given ARM's very
liberal fees by industry standards.

High volume, high margin fat lambs like Qualcomm merrily eating grass around,
or obscenely high margin high-end network chips would've ended on a dinner
plate much, much earlier if ARM had an American business culture.

~~~
starfallg
Softbank can do that themselves if that was the plan.

~~~
Tostino
SoftBank needs cash now, not later. Their horrible bets all got called this
year.

~~~
starfallg
Softbank is getting just $2bn right now. And the next payment at closing is
only $10bn, the rest is in stock.

The whole Softbank needs cash now to fill the WeWork hole doesn't add up. They
could have made more cash with an IPO, in similar timescales.

------
xoa
Just doing some napkin math to give myself some other context in my own head
with something much smaller, die size for the Apple A14 isn't out yet, but the
A13 (found in the iPhone 11 series and SE 2) is around 98mm^2 manufactured on
TSMC's 2nd gen 7nm N7P. A14 might be something like that, because while it's a
smaller process Apple boosted transistor count by 38% as well.
Lazily/conservatively taking off 10mm on the edge for squares into a circle,
that'd be about 630 chips per N5 wafer, a high enough count that chip loss
rate shouldn't be too far from defect rate. Even assuming they can get 90%
yield right out the gate (maybe generous) that's still about $30/chip, just
for manufacturing without any R&D amortization, packaging etc. That actually
seems not insignificant going by historical iPhone BOMs [1], so even for
smartphones with their far far smaller SoCs 5nm at launch isn't nothing.

The continued ongoing progress in silicon is just mindblowing when you dig
into the details in any real way. I was blown away already watching the
"Indistinguishable From Magic: Manufacturing Modern Computer Chips" [2]
presentation years ago, which _still_ seems incredible and yet that's all
talking about now ancient tech. The increasing costs and design challenges
though are also going to have interesting effects on the industry, as who/what
has the margins to afford fabbing aggressive chips on the cutting edge might
start to diverge a bit more. I also wonder how longevity will be, I remember
speculation that smaller processes would eventually have to deal with more
risk of earlier breakdown even in more normal shielded settings. And speaking
of that, in higher rad environments it's normal to use older bigger processes
since they're more resistant to disruption. I wonder if small enough processes
ever make that more of a consideration even at sea level.

\----

1: iPhone Xs Max for example: [https://technology.informa.com/606680/iphone-
xs-max-costs-ap...](https://technology.informa.com/606680/iphone-xs-max-costs-
apple-20-more-in-materials-than-last-years-smaller-iphone-x-ihs-markit-
teardown-reveals)

2:
[https://www.youtube.com/watch?v=NGFhc8R_uO4](https://www.youtube.com/watch?v=NGFhc8R_uO4)
(highly recommended if you haven't seen it)

~~~
ajross
> Even assuming they can get 90% yield right out the gate (maybe generous)

That seems outrageously generous. Rememember that Apple doesn't (as least
hasn't so far) bin their parts to sell the ones with faults via different
configurations. The only way to get a chip yield like that for a single device
configuration is with a ton of redundancy.

I certainly don't know what the yield rate is of Apple silicon, but I
definitely don't believe 90%.

~~~
ggm
If Apple wanted to bin the chips, they have devices crying out for low-power
draw, albiet slower clock. They can sell a tonne of earphones, watches, HDMI
enabled USB-C dongles. They could re-purpose chips which can clock 10x slower
for 1/2 the cores, and still have too much CPU. But free.

They can use them for the Apple touchpad, the keyboard, the on-mobo
controllers which currently consume non-general-purpose chips, if they want
to. If they displace a 10c part by an otherwise redundant $30 part, they are
still ahead, if it works.

~~~
manquer
The power draw for a full blown chip like A13 is vastly different from that of
the typical ones you find in the devices you mentioned. Also the form factor
could limit for many of the smaller devices

~~~
ggm
Yes, I realised this was stretching the argument after I posted. Probably,
repurposing terminates in slower, lower spec devices the A13 targets anyway.
Maybe in something like the Apple TV?

It would be true that compared to Intel they have far less binning
opportunities

~~~
Fredej
One way to bin it would be:

Macbook -> iPad -> iPhone -> Apple TV

------
chx
That's quite cheap.

Consider how gigantic a wafer is.

I can of course only run calculations against the half price 7nm node but you
will see...Even the mammoth (as in, reticle limited) nVidia A100 is just
826mm^2. [https://anysilicon.com/die-per-wafer-formula-free-
calculator...](https://anysilicon.com/die-per-wafer-formula-free-calculators/)
says 57 of those fit on a single wafer. This table says the price of a 7nm
wafer was 9346 so nVidia paid about 164 USD for each of those. The A100 card
-- of course piled with RAM but still -- sells for ten grand.

~~~
c2h5oh
That's double the rumored price of 7nm wafer and 5 times of 14nm wafer

------
npunt
~650MTr per $ at super low power level, not bad.

TSMC's N5 process density is ~171MTr/mm2 and the area of a 300mm wafer is
70,685mm2. Shave off maybe 5,000mm2 for edges and you're at 65,000*171,000,000
= 11 trillion transistors for $17k, or about 650 million transistors per
dollar. Apple's A14 11.8BTr so minimum ~$18.20 at this price. Of course
there's defect rate to consider.

------
javajosh
Bah, I could setup a large format camera and do optical reduction of an
arbitrary B&W image, transfer that image onto a semi-conductor with a laser,
then deposit a thin layers of metal (and whatever) onto it in a vacuum chamber
for like, maybe $5 of material. What a ripoff.

~~~
shrubble
You can in fact do this.

The process for the original 6502 chip is publicly available I think. You
could make it even smaller than the original 8um, probably.

~~~
javajosh
I know its possible, I was only being 25% facetious (which is presumably why
someone downvoted me). FWIW in all seriousness, getting anything non-trivial
to work at 8um would be VERY impressive in a garage-level environment, and of
course you'd _still_ be off world-class fabs by 3 OOM!

------
4cao
For some context, the table is on pages 44 and 45 of this PDF:
[https://cset.georgetown.edu/wp-content/uploads/AI-
Chips%E2%8...](https://cset.georgetown.edu/wp-content/uploads/AI-
Chips%E2%80%94What-They-Are-and-Why-They-Matter.pdf)

via
[https://twitter.com/chiakokhua/status/1306437988801486848](https://twitter.com/chiakokhua/status/1306437988801486848)
(the article is based on this guy's tweet)

Also note these are not actual prices but estimates.

------
throwaway4good
I wonder what the internal cost is for TSMC to do a wafer is?

The variable cost if you will: The cost of materials, electricity, staff etc.?
Probably a very small amount.

The big cost for TSMC is the fixed cost of the expensive equipment and the
massive R&D in developing the process. However the amount is interesting since
if you wanted to spend a massive billions of dollars and setup a competitor to
TSMC, you know that TSMC would be able to compete with you on price all the
way down to that point.

~~~
lowdose
You can look at ratios like WACC and ROIC.

TSMC's weighted average cost of capital is 7% (WACC)

ROIC % measures how well a company generates cash flow relative to the capital
it has invested in its business. For TSMC the ROIC is 28%.

If you would like to compare competitors these ratio's combined with growth
rate give a very good market overview.

[https://www.gurufocus.com/term/wacc/NYSE:TSM/WACC-/Taiwan-
Se...](https://www.gurufocus.com/term/wacc/NYSE:TSM/WACC-/Taiwan-
Semiconductor-Manufacturing)

------
etaioinshrdlu
In the table on the page, why does "Foundry sale price per chip" decrease,
while "Foundry sale price per wafer" increase?

Does it have something to do with the average chip area being much larger at
larger process nodes?

~~~
swsh
I assume as transistor density increases, you get more chips per wafer.

~~~
tyingq
AMD style chiplets also increase yield.

------
jjcm
For info, around 600 A13 chips fit on a 300mm wafer. Means Apple is paying
around $29 per chip.

~~~
dasudasu
If the chip yield is 100%.

~~~
greenknight
Apple may be paying just for working chips, rather than wafers.

~~~
futhey
If you're their largest customer, and there are no alternative suppliers,
leverage works both ways -- but it's beside the point. TSMC does multi-year
low-scale runs of new processes to figure out tooling and reduce errors,
before committing to huge orders.

------
anfilt
That's a pretty good price. Imagine if masks did not cost so much to make. We
would see tons more custom designs.

------
gruez
How do defects factor into pricing? Do you pay $17,000 per wafer, regardless
of the amount of defects? What if TSMC's estimates are off? If defects are
higher than expected, do you get a rebate?

~~~
to11mtm
You pay the same per wafer regardless or defects.

I'm assuming whatever happens if estimates are off is a crapshoot depending on
your contract and specifics.

I could be wrong but there is also usually at least a little 'buyer beware' on
newer processes; I know that was a big part of AMD being kneecapped at the
offset of the Bulldozer arch era.

------
etaioinshrdlu
The title should say Estimated, not revealed.

------
buryat
I'm surprised, that's pretty cheap

~~~
gruez
I assume it's bulk prices, requiring thousands/tens of thousands of wafers of
commitment.

~~~
ComputerGuru
I don’t think they need to require it - you’d be crazy otherwise because you
have to pay the multimillion dollar cover charge (to make the masks).

------
profile53
Can someone help me contextualize? 300mm diameter is 70,686 mm^3. If a chip is
300mm^3, does that mean the company can print about 235 chips per wafer or is
it much lower? At 235 chips and a 100 dollar retail price, that doesn't leave
much of a profit margin (23,500 gross vs 17,000 to TSMC).

~~~
npunt
A 300mm2 chip would have about 50B transistors, 4x an A14 and 1.8x a Geforce
GA102 (RTX 3090 chip). Don't think anyone would sell that for $100 in 2020.

~~~
jsjohnst
You need to check your sources or your math, likely both.

~~~
monocasa
A 5nm 300mm die is pretty close to 50B transistors. The whole chart is based
on a 90B transistor 610mm die at 5nm that costs around $200. Hence why the die
cost of 90nm implies wafer scale level of transistors for the per chip cost.

------
cottonseed
For context, a skim of random internet sources claim that TSMC produced 1.1M
7nm wafers last year.

------
quyleanh
Wait, wait. Is this the total price? I think it's much expensive. $17000 for
300mm wafer is unbelievable.

------
person_of_color
What's TSMC's secret sauce compared to American fabs?

Cheap labour?

Government handouts?

~~~
futhey
There aren't really subsidies for TSMC here in Taiwan. I would say labor cost
is relatively cheap (compared to western countries), and security is
relatively high (compared to the Chinese ecosystem).

A big reason it happened here is probably more to do with how manufacturers
started combating intellectual property theft decades ago. Firms who wanted to
manufacture in China manufactured a few key components in Taiwan to maintain
control over output, then shipped them to Guangzhou for final assembly.

I'm not sure there's a "secret sauce". It's more they quietly built a decade
plus lead on their closest competitors when they were in the "less desirable
market" (compared to Intel, AMD, and Nvidia), and there are huge barriers to
entry, with little short-term incentive to DIY (vs. contract manufacturing).

TSMC is actually now Taiwan's single biggest energy consumer, using about 5%
of the entire country's electrical supply.

~~~
blueblisters
> There aren't really subsidies for TSMC here in Taiwan.

Subsidies don't need to be direct cash handouts/tax deductions. I think the
real advantage TSMC gets over its non-Asian competitors is government spending
on infrastructure specifically for silicon fabrication. TSMC has guaranteed
access to water, electricity and engineering talent from local universities on
a resource constrained island.

It's smart industrial policy that is the key behind the rise of a lot of Asian
tigers, and something other countries should study as well - laissez faire is
not always the optimal answer to innovation.

------
tus88
Imagine how many rtx 3080s could come out of that.

~~~
nitinreddy88
Zero. They are using Samsung 8nm process for producing all RTX 3 series

