
Intel Quark Runs on Roof, Raises Questions - ChuckMcM
http://www.eetimes.com/document.asp?doc_id=1319447
======
ris
"We looked at Freescale and ARM too but decided on using Quark"

Interesting that he doesn't say why here. There's no "it simply had better
performance", "it did more with the power budget" or other reason.

I suspect Intel were quite eager to have a customer and case study to launch
with.

~~~
ams6110
Two sentences later: "Security software gave Intel the edge over ARM."

~~~
ris
It's a pretty lame reason. A "HVAC giant" should easily be able to lean on a
software vendor to get their software running on anything (sane) they ask them
to.

(McAfee security software? really?)

~~~
fnordfnordfnord
>(McAfee security software? really?)

It's a name people who wear hard hats recognize. Commercial HVAC people aren't
hip like us.

~~~
gonzo
It's also an Intel subsidiary.

------
ChuckMcM
So if you were still wondering if ARM isn't directly lined up in Intel's
sights, this should dispel that notion.

For a couple of years now I've noted that one advantage ARM had that seemed
quite durable was you could put it into the SOC of your own design, but you
could not do that with an x86 chip. If Intel is willing to allow that it is a
potent weapon.

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tedsanders
Can someone knowledgeable comment on whether Intel's foray into the realm of
ARM and embedded systems is significant? Will anything substantial change as a
result of their entry into this already populated market?

(I guess one thing the article mentions is that Quark is potentially more
secure than the alternatives. Presumably embedded systems security will be a
bigger issue as we approach the future Internet of Things.)

~~~
wmf
Every non-x86 processor from Intel has failed, so there's that.

~~~
meepmorp
The i960 did ok, and still finds use in some military applications. But, on
the other hand, Itanic.

~~~
jes
Yep. Fond memories of writing an execution trace disassembler for the i960CA
back in the early 90s. The chip had an 8-bit incremental trace bus, which made
it possible to produce an execution-time instruction trace, as long as the
code didn't modify the instructions in memory.

~~~
kps
I wrote and instruction scheduler for the i960CA, which was fun. (For those
who don't know, the i960CA was the first superscalar microprocessor.) It took
assembly code as input and contained (as close as I could get from public docs
to) a cycle accurate timing simulator.

Less fun was the associated project of getting the GNU assembler and linker to
run under 16-bit DOS. I recall that at the the time the linker consisted of
_one_ giant source file, and one of the tools (I think the assembler)
contained the wonderful declaration:

    
    
        int malloc();

------
rektide
What's the volume on a reasonable sized small batch of chips? How small of an
order does it make sense to go down do doing your own chips? If one buys the
IP, is it Intel fabbing the chips, or do you have to take the resultant work
elsewhere, or is it your option?

------
samspenc
Does anyone know how fast this thing runs? Is it comparable to 386, 486,
Pentium speeds, etc?

