
BOOM Open Source RISC-V Core Runs on Amazon EC2 F1 Instances - ingve
https://www.cnx-software.com/2018/12/13/boom-risc-v-core-amazon-ec2-f1/
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ycnews
Presentation slides (pdf) from Hot Chips 2018 (tape out):
[http://www.hotchips.org/hc30/1conf/1.03_Berkeley_BROOM_HC30....](http://www.hotchips.org/hc30/1conf/1.03_Berkeley_BROOM_HC30.Berkeley.Celio.v02.pdf)

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_chris_
And in video form, if that's your thing:
[https://www.youtube.com/watch?v=_mZORF2vHAA&feature=youtu.be...](https://www.youtube.com/watch?v=_mZORF2vHAA&feature=youtu.be&t=4346).

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nickik
And this video with even more information, including future directions.

[https://youtu.be/sI6Z21ljXsw](https://youtu.be/sI6Z21ljXsw)

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sagark
For a more visual demo about what this article is talking about, here's a
(real-speed) GIF of posting a tweet from BOOM running on EC2 F1:

[https://twitter.com/firesimproject/status/103126763730350899...](https://twitter.com/firesimproject/status/1031267637303508993)

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patrickg_zill
What FPGA do you need to use for this cpu otherwise? I would think that it
would be a lot cheaper to have one locally if you were still developing or
testing out your application or code.

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_chris_
Unless you cut out floating point and superscalar, it requires a fairly large
FPGA, on the order of >$1000. So you'd have to put it to serious use to break
even with using AWS.

The other advantage of AWS is scale-out once you want to get benchmark data
and not wait forever (or to simulate warehouse scale computers). In the past,
maintaining our own FPGA cluster was a nightmare.

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tverbeure
I haven't tried BOOM specifically, but if you're interested in a large FPGA
that can be acquired very cheaply, you should look into the Pano Logic G2 thin
client. They used to be available in bulk for $3 a piece, but those have now
all been snapped up by hobbyists.

But you can still get them for $20 or so on eBay.

They have a Spartan-6 LX150 (DVI version, revB) or Spartan-6 LX100 (DVI
version, revC), which are really huge FPGAs. It's by far the best deal in town
if you're interested in that kind of stuff.

Google for "github panologic-g2" to find up-to-date proceedings about the
reverse engineering effort.

Right now, the FPGA is up and running and outputting an image over DVI.

Do you have any idea about how many FFs are needed for a BOOM CPU?

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4ad
I don't know anything about FPGAs, are all FPGAs compatible? Assuming this
fits on an FPGA, does it work on every FPGA?

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_chris_
No, the IO plumbing and infrastructure are different. FPGAs are a total pain
because each platform is different. :'(

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tgtweak
Are there any good visual examples of how an out-of-order pipeline processes
instructions compared to traditional ones? What's the main advantage?

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Cyph0n
Most (all?) modern processors utilize out-of-order execution. The main
advantage is that it increases IPC (instructions per cycle) in the long run.

The high-level idea is that you queue up your instructions in a table of sorts
and execute them as they're ready (i.e., based on dependencies). You then re-
order the instructions at the end of the pipeline.

The main challenges with this technique are: (1) handling exceptions and (2)
speculative execution. For (1), you can use a re-order buffer. For (2), you
would typically flush the instruction table noted above.

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muizelaar
The ARM Cortex-A55 is modern and in-order. Out-of-order CPUs tend to be large
so if you want a small CPU you'll still go with in-order.

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bogomipz
Interesting. Is lower power OOE an area of active research?

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zozbot123
The Mill processor architecture deserves mention here, as it basically aims to
bridge VLIW-like low power usage with OOO-like performance. The way it
attempts to do this is too complex to explain in a short comment, you can find
detailed info on their website - but broadly-speaking it involves all sorts of
'tweaks' to ordinary VLIW, that ultimately result in something a bit
different. (It should also be noted though that the initial, instruction
decoding stages of a Mill-like 'belt' architecture are a lot closer to OOO
than an ordinary VLIW. So the projected power savings would seemingly have to
come from elsewhere - but they can be quite significant nonetheless, so the
effort is projected to be worthwhile.)

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bogomipz
Interesting I remember hearing about this processor architecture. Is is still
being actively developed? I didn't see much in the way of news on the Mill
site.

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opencl
There are a few recent forum posts indicating that they're still working on it
at least, but it seems to be going extremely slowly.

5 years ago it had already been in development for 10 years and there was
supposed to be silicon shipping in 2-3 years. 2 years ago they were talking
about an FPGA prototype that has yet to show up.

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webaholic
I wish it, or a cut down version, would run on a cheaper FPGA (like the Zynq
or Zedboard, ~250$). Running on the EC2 F1 instance is not really an option
for students given that it costs about ~10$ per day.

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ajross
It's a comparatively big, application-class CPU. You're asking too much. Those
cheaper FPGAs are cheaper because they're smaller, and BOOM won't fit.

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webaholic
Not entirely unrealistic. Removing the FPU and reducing the width should get
it to fit.

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PhilWright
But then it would not be an application class processor.

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ape4
Little thing, this OUT OF ORDER cpu was created IN ORDER to...

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_chris_
My parents thought it was quite odd that I named it the Berkeley Out of Order
Machine. "Why would you advertise to the world that it doesn't work?"

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phkahler
BOOM really needs to get compressed instruction support. Until that's in I
would assume development has stalled since it's required to run precompiled
Debian and Fedora packages.

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nickik
What? Because the feature you want is not there, development has stalled?

There is lots of useful things you can do without C. Also, it has not stalled:

[https://youtu.be/sI6Z21ljXsw](https://youtu.be/sI6Z21ljXsw)

~~~
phkahler
My wording was a bit harsh. The git repository hasn't been very active, but
not dead.

The C extension is mentioned in that video as a priority but it sounds like
some of the other priorities are being worked on (maybe there's funding for
spectre mitigation work). Anyone who wants to use BOOM outside of research is
going to need the C option because that's the standard for OSes. They said
it's nice not to have to maintain a fork of Rocket Chip, the same will be true
of not needing to recompile everything without C.

It is more active than I thought.

