
What the Next-Gen Verification Flow Will Look Like - Lind5
https://semiengineering.com/what-will-the-next-gen-verification-flow-look-like/
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BracketMaster
Super fascinating!! Verification is SUPER important I think. I actually wrote
an FOSS end-to-end TensorFlow CNN accelerator that can be synthesized for
FPGAs using completely FOSS tools.

I'm working on adding formal verification to it. I used FOSS tools such as
Yosys and NextPNR, made possible by FOSS hackers who reverse engineered
different FPGAs.

I hope to release the full codebase at the end of this summer.
[https://bracketmaster.github.io/MAERI-
RTL/](https://bracketmaster.github.io/MAERI-RTL/)

I also started a company working on a completely FOSS CPU+GPU using similar
approaches. [https://systemeslibres.org](https://systemeslibres.org)

