
Towards an optical FPGA – Programmable silicon photonic circuits [pdf] - godelmachine
https://arxiv.org/ftp/arxiv/papers/1807/1807.01656.pdf
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alvesjnr
Hi,

I'm the author of this paper [15] cited in OP's publication. We are the author
of the very first implementation of a fully programmable optical linear
circuit in silicon. This is the basic building block to have an optical
processor (in this specific architecture).

Ask me anything.

[15] -
[http://www.photonics.intec.ugent.be/download/pub_3834.pdf](http://www.photonics.intec.ugent.be/download/pub_3834.pdf)

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georgeburdell
Could you explain, or maybe point to a good textbook with a chapter on the
subject, why the coupling efficiency to the second waveguide on the
directional coupler peaks at a certain intermediate waveguide length? I have a
PhD, just not in photonics.

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alvesjnr
I'll try an ELI5:

When the light propagates in a waveguide as the one used in my circuit, the E
and H components of the EM wave are not fully confined to the waveguide, but
part of it stays outside the waveguide. If you put two waveguides close to
each other and makes the light travel to the first waveguide, part of the EM
field of the light will also see the second waveguide.it makes part of the
ligh couple to the second waveguide. As the wave travels, more and more light
couples to the second waveguide. If you engineer it well, at some point 50% of
the light will be confined in each waveguide. At this point you separate both
WG and you have a 50:50 coupler.

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georgeburdell
Yes I know that the mode isn't perfectly confined in the waveguide, but Figure
4(b) of the article shows the coupling efficiency to the second waveguide
going _down_ as the length of the intermediate waveguide gets longer past some
critical value. That's the part that gets me.

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georgeburdell
I used to work in the industry and caught this article a few days ago during
my usual arXiv trawling. Prof Reed's group has put out a few papers on
erasable ion-implanted waveguides over the past couple of years from different
angles, most notably erasable optical test points in circuits. The "FPGA" part
is a bit of marketing because the waveguide erasure cannot be undone, but I do
believe the last bit where the circuit topology is permanently altered between
different optical communication protocols has some merit. This would enable
manufacturers to be more nimble about which chips they can deliver based on
demand, and might offer a yield recovery mechanism in a similar manner to
which fuses are used on logic chips to disable non-functioning parts of the
chip during the chip "Sort" step.

Overall, good paper.

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0xdead_beef
There are still anti-fuse FPGAs in manufacture and in use today (one-time
programmable burn-in devices)

My question: could programmable waveguides be done with MEMS technology?
(mechanical features etched in silicon)

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deepnotderp
With "erasable waveguides" this seems more an "eASIC" than an FPGA, no?

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overcast
There was a huge amount of interest, and an equally massive grant(billion)
given to the Rochester,NY area for building up photonics research. Haven't
heard much of it the past year though. Sounds like the natural progression
from electrical circuits, particularly in the low thermal output.

