
An LZ Codec Designed for SSE Decompression (2016) - mmastrac
http://conorstokes.github.io/compression/2016/02/15/an-LZ-codec-designed-for-SSE-decompression
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XDirtyPunkX
If you're interested in results, it's also worth reading the follow-up which
show that on equal footings LZSSE8 is a more general choice than LZSSE2 which
works well on text and in high compression scenarios
([http://conorstokes.github.io/compression/2016/02/24/compress...](http://conorstokes.github.io/compression/2016/02/24/compressor-
improvements-and-lzsse2-vs-lzsse8)).

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alkoumpa
posts involving vectorization are always nice, especially if it involves
compression. I'd love to see a vectorized version of arithmetic coding, that
would definitely be interesting

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eutectic
[https://arxiv.org/abs/1402.3392](https://arxiv.org/abs/1402.3392)

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oso2k
This is pretty cool. It competes well with lz4 even if it is amd64 only. I
wonder what an ARM version would look like. Here's to hoping he author keeps
working on this.

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XDirtyPunkX
LZSSE author here, Evan Nemerson has started a portable version of LZSSE that
uses his own SSE emulation layer and has apparently got it working on the
Raspberry Pi 2.

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XDirtyPunkX
For anyone wondering, that project is called LZSSE-SIMDe and is available here
([https://github.com/nemequ/LZSSE-SIMDe](https://github.com/nemequ/LZSSE-
SIMDe)).

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Andys
Has anyone seen any work done on a virtual machine bytecode that leans on
Intel AVX to do its work in parallel?

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kobeya
Many intermediate languages support vector extensions...

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Andys
I was referring to actual execution of bytecode in parallel, not just support
for vectorized math.

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sounds
Probably wouldn't work in the general case, as each of the bytecode streams
would generate memory accesses that are completely independent.

Not to restate the obvious, but SIMD relies on locality of data access to keep
the SIMD unit fed with enough data bandwidth.

