
Intel’s Plans for 3DXP DIMMs Emerge - dzaragozar
https://www.realworldtech.com/intels-3dxp-dimms/
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jzelinskie
It seems obvious in retrospect, but persistent memory adds a pretty exciting
new advantage for persistent data structures.

Another thought: As potentially paradigm changing technology like this becomes
available will it ever make sense to redesign the OS?

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gravypod
Zero serialization. Imagine installing a program and always having it
"running". It may be swapped out but littetally everything in it is ready to
go when you switch to it's window.

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robotresearcher
We have that right now, do we not? You don't _have_ to quit apps except on
reboot.

Except that many apps are so buggy you have to restart them often in practice.
NVM won't change that, sadly.

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fh973
While there are some analytics workloads that will benefit tremendously, the
main use case will be improving server utilization.

Currently RAM is not a compressible resource like CPU. However many
applications don't have a fixed or if easily predictable RAM footprint and so
you have to overprovision. Swap has been there to solve that but with its
performance impact, it often can't be used for server applications.

These DIMMs will blur the boundary between memory and swap and make swap again
viable.

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tpetry
I dont get your logic. CPUs have a finite number of instructions they can do
in a timeframe, its not compressible. In the other one someone could compress
the memory, works great for storage. Sure, it‘ll be slower but compressing
seldomly used memory pages like macOS does is indeed possible

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oblio
I think his point is that you can "run" a large amount of applications at the
same time on a CPU. It will execute everything, albeit slowly. This might not
be acceptable for performance concerns, but it's doable.

He's not talking about actual data compression in RAM. Because even with
compression, with current OSes, if you try to fit more than 20GB of data,
let's say becoming 10GB compressed, into 5GB of RAM, it's not possible. You
have to swap and at that point your performance is completely gone.

The performance gap between an overloaded CPU and swapping is humongous. One
is annoying or slightly troublesome, the second is a death knell.

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grogers
One interesting thing for databases is that as nonvolatile storage latency
decreases, traditional btrees get more attractive relative to newer log-
structured designs. Especially if the write endurance is increased as well
over current SSDs.

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wtallis
Or to put it another way: there's not a lot of reason to have two layers of
log-structured storage. Your SSD already needs its own log-structured flash
translation layer, and if that's tuned properly for your database workload,
then another layer of the same kind of thing may not help much.

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gravypod
There's so much amazing stuff I could do with this. Imagine persistent redis?
Huge huge pages? Booting from a DIM?

The possibilities are endless.

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oh_sigh
Why can't we just put a battery onto DRAM that maintains state if the power
goes out, and be done with it?

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hetman
Because the power consumption to keep DRAM refreshed is fairly high so you'd
need a pretty big battery, and because it would still be more expensive than
3DXP. It's just not practical for most use cases.

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amelius
I figured that, but can we have some numbers here?

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QuadrupleA
I guess in a theoretical NVM-only system you could pull the plug at any time,
and instantly resume it when the power is back on? If I'm reading right though
the latency of 3DXP is somewhere in the 10-20us ballpark, still 100-1000x
slower than DRAM.

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sp332
Yes but it's also cheaper than DRAM.

You could resume after pulling the plug as long as things are consistent. If
you commit data in the wrong order you could have trouble!

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ksec
Price. Remember the current DRAM is 2.5x the price of what is was two to three
years ago. So the XP DIMM being 4x cheaper then DRAM Now isn't that much
different if DRAM dropped back to its median level.

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kristianp
Is there any tech that's faster than DRAM and cheaper than SRAM? There's a
need to fill that gap.

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AtlasBarfed
L2/L3 cache?

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kristianp
That's SRAM usually.

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Ocha
website times out. Also, this story hasnt been reported by any other news
source. Is there some other site I can see the story at?

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dkanter
Website should be up, I just rebooted AWS :)

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kartD
Unfortunately it’s still timing out :(

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dkanter
Should work now. apache was getting freaked out.

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kartD
Yup it works, thanks!

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inamberclad
On a few occasions I've found myself in the presence of a senior engineer at a
large defense company who would never stop talking about how persistent memory
will change everything forever. Fair enough, but he'd go on about it in the
weirdest ways. I think his impression is that the CPU registers would also be
nonvolatile. I'm concerned that guy might be a few electrons short of a full
orbital.

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vbezhenar
Saving and restoring CPU registers and flushing caches into non-volatile
memory doesn't require much time or energy.

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monocasa
Specifically, you can normally do something like that between when you notice
the power dropping and when it drains too much and you have to shut down.

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AtlasBarfed
The initial release was really underwhelming, given the hype around this. So
my personal (uninformed) expectations is just incremental improvement to the
initial product.

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wtallis
Moving 3D XPoint memory from the peripheral IO bus to the memory bus is way
more than an incremental improvement.

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throwaway2048
Says the company that claimed it would be 1000x faster than NAND flash, it
isn't, and moving the location of the bus isn't going to change that.

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wtallis
> Says the company that claimed it would be 1000x faster than NAND flash, it
> isn't, and moving the location of the bus isn't going to change that.

Using the IO bus instead of the memory bus is exactly why existing Optane
products haven't delivered latency that's 1000x better than NAND flash. NVMe
transactions take at least 5-10µs even with DRAM as the SSD media rather than
NAND flash or 3D XPoint. Moving to the memory bus is a prerequisite to 3D
XPoint fulfilling those original performance claims.

