
Porting Alpine Linux to RISC-V - kristianp
https://drewdevault.com/2018/12/20/Porting-Alpine-Linux-to-RISC-V.html
======
Perseids
Something that has been bugging me for a while: Why is cross compiling so
hard? After all, compilers are just C programs (or C++/Go/Rust/… programs).
It's not like a target implementation is using some magic instructions from
the host to generate the assembly, or that it is harder to calculate some
32bit offsets for the compiled program, when the compiler is running on a
64bit host environment.

Or is it about the helper programs / scripts around the core compilation
process that are too often hard coded to read out the configuration from the
host system? So basically there is no technical hurdle, just the social norm
that target arch == host arch, and thus make procedures aren't sufficiently
tested for cross compilation from the get go?

~~~
Thaxll
Go compiler is built in Go, big difference ( all of Go is built in Go). Cross-
compiling in Go is the easiest of any languages as far as I know.

Ex: GOOS=windows go build .

GOOS=linux GOARCH=arm go build .

And you can run that from any os / arch, I can build a single Windows binary
from my Raspberry Pi with the above example.

[https://golang.org/doc/install/source#environment](https://golang.org/doc/install/source#environment)

~~~
krylon
As opposed to C/C++ compilers being built in C/C++?

EDIT: Try to build NetBSD for some esoteric platform from the comfort of your
desktop machine. Remember to pick up your jaw from the floow when you're done.
;-) My point is, it does not have to be hard.

~~~
Thaxll
Rust compiler is LLVM afaik so C++, same for the JVM / C#. Having your entire
runtime / tools in the same language make it easier.

~~~
steveklabnik
This is true for Rust, however, given that LLVM is the project doing the
codegen, it's a little bit special; cross-compiling it to the platforms it
supports is a bit easier than a random C++ library, since it's the one with
the support in the first place.

Rust projects make much more use of C libraries than Go projects do, though,
so for things other than the Rust compiler, this is still a good point.

------
jamesaross
I wrote a short paper for HPEC that included some power and performance
benchmarks and analysis on the HiFive Unleashed U540 SoC [0]. The SoC isn't
open source as some suggest although I believe the core is based on the open
source Rocket Chip Generator [1]. It seems the greatest weakness was in the
slow memory interface. The details of memory controller and configuration were
proprietary when I tried to find out why it wasn't performing well.

[0] [http://www.ieee-
hpec.org/2018/2018program/index_htm_files/15...](http://www.ieee-
hpec.org/2018/2018program/index_htm_files/150.pdf)

[1] [https://github.com/freechipsproject/rocket-
chip](https://github.com/freechipsproject/rocket-chip)

~~~
drewg123
From [0] above:

 _The STREAM benchmark [6] was also compiled and executed, confirming that
DRAM performance is limited to less than 1.6 GB /s on this platform. It’s
unclear if this is a problem with the cache hierarchy, memory controller, or
the configuration of the DDR Controller Control Registers_

Wow, that's unspeakably terrible. That's about 10-20% of the b/w one should
get from 2400 mem (depending on how many channels the mem controller uses).

I hope this is some simple misconfiguration that can be fixed in firmware or
in the kernel.

------
amelius
A few questions:

\- In which fab is the CPU manufactured?

\- How much slower does it compile stuff than a mainstream CPU? (Author only
says "somewhat slower", but could have been more precise)

\- Is the RISC-V architecture free from Spectre-like bugs?

\- What does the memory hierarchy look like?

~~~
rwmj
It's built on TSMC's 28nm process.

It's an in-order 64 bit 4 core processor (actually 5 cores, because there's a
small 32 bit core which does nothing normally). Think Cortex A53. It's very
usable for development (I have two of them), and we even have people using
them for desktop running GNOME. But it's not a Xeon. The main issue is the
cost and lack of SATA on the development board (there's a daughter board
providing that, at extra cost). Everything is open source.

This chip is free of speculation bugs because it doesn't do speculation.
However the architecture itself is not in any way better or worse than others,
and a RISC-V core with a different microarchitecture might well be vulnerable,
although since these attacks are now well-known steps should be taken by
designers to avoid them.

Memory architecture is very simple, it has small L1 and L2 caches and main
memory. There's also a chiplink connection which takes the memory bus off-
chip. You can read more here: [https://www.sifive.com/chip-
designer#fu540](https://www.sifive.com/chip-designer#fu540)

~~~
mntmn
Thanks for the explanations. Do you know if people have attempted interfacing
with Chiplink using homebrew FPGA solutions?

~~~
rwmj
The daughterboard is relevant here:

[https://www.crowdsupply.com/microsemi/hifive-unleashed-
expan...](https://www.crowdsupply.com/microsemi/hifive-unleashed-expansion-
board)

It takes the Chiplink connection and routes it to a PCIe bridge. There's also
a large FPGA on there, but I'm not quite clear how it's all connected up.

I don't know much about what people are using this for. Also the whole setup
costs like $4000 so I guess it's not quite ready for casual home users just
yet. If you want to go the FPGA route, then it might be better looking at a
Virtex-7 and putting the RISC-V rocketchip core on there, along with whatever
local customizations you want to try out.

~~~
matoro
Do you know if it is possible to actually purchase the daughter board? As far
as I can tell they only made a limited supply for the crowdfunding program.

~~~
rwmj
We have one at Red Hat, but I don't know if they're making more of them. We're
expecting new RISC-V hardware in 2019.

------
chli
I would be very interested on some background on how the musl bugs were
discovered and debugged !

~~~
Sir_Cmpwn
strace, mainly, and the help of the experts in #riscv on freenode.

------
eatonphil
Thanks for the post and nice work, Drew! I look forward to Linux/BSD-capable
non-x86 boards becoming easier to find and cheaper to buy over time. This one
is not the cheapest board but since I'm indefinitely in line for a Pine64 (and
can't find much else) I may take a look at this.

------
bogomipz
The author states:

>"I’m working on making this hardware available to builds.sr.ht users in the
next few months, where I intend to use it to automate the remainder of the
Alpine Linux port and make it available to any other operating systems
(including non-Linux) and userspace software which are interested in working
on a RISC-V port."

Is this author also the designer of the board? Or do they made they're working
on making the software available?

This looks really exciting, looking forward to following the progress.

~~~
SpaceManiac
The author means making compute time on the hardware available to run CI
builds on their service. If you care about porting your software to RISC-V
enough to want to test that software there, hardware is probably a more
accurate harness than qemu.

~~~
IntelMiner
I'd love to see time being given to Gentoo. They're basically up there with
Debian in terms of supporting "alternative" architectures

According to the Handbook. They currently support

Alpha, AMD64, ARM, ARM64 HPPA/PA-RISC, IA64, MIPS, PPC, PPC64, SPARC and x86
(i486 and i686)

~~~
als0
Beyond even. A while ago Debian dropped support for Alpha, IA64 and PA-RISC.
Even SPARC isn't supported anymore.

[https://www.debian.org/releases/stable/i386/ch02s01.html.en](https://www.debian.org/releases/stable/i386/ch02s01.html.en)

~~~
wbl
You gotta love an arch that can reorder dependent reads.

~~~
bogomipz
Which arch permits reordering of dependent reads? Might you have any resources
you could share? Thanks.

------
Annatar
"This board is cool."

What exactly is cool about this board?

~~~
rwmj
It's all open source.

~~~
ddevault
It's also surprisingly nice. 8G of DDR4 EEC RAM, 4 surprisingly fast CPU
cores, and a gigabit ethernet port - it all adds up to a really pleasant board
to work with.

~~~
tyingq
That is nice, though at $999, expectations would be pretty high.

~~~
Sir_Cmpwn
Well, it's the also first RISC-V CPU available to the general public. I expect
prices to come down in the future, but I was definitely surprised with the
quality of the "first" CPU.

~~~
Annatar
That CPU has one of the worst instruction sets ever: the mnemonics are even
worse than intel, which was hereto considered the stupidest up until this
point. That's an achievement. They will have to be hidden by compilers because
they're otherwise complicated and a pain in the ass to program.

------
mehrdadn
I tried Alpine and immediately stopped when I saw how old the packages were.
How do people use it...?

~~~
kortilla
>How do people use it...?

You don’t. It’s a baked in reminder that logging into a container is a sin
worthy of punishment.

~~~
emersion
Alpine is a pretty good standalone distribution IMHO. Main upsides are musl
and apk, which makes it lightweight and fast.

