
Decoding Photographs of the IBM 5100's Executable ROS - mmastrac
https://github.com/stepleton/5100ExecutableROSDecode/blob/master/Executable_ROS_decode.ipynb
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ardy42
> The youngest 5100s are a bit over 40 at time of writing, and some accounts
> online suggest that the ROS devices are no longer dependable.

That must be why John Titor needed to go back to 2000 to retrieve one.

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rootsudo
Well, I'm glad this was the first post. Let the legend live on.

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the_biot
Why not just grab the data with a logic analyzer while it's on the bus? I see
no reason for the whole OCR workflow here.

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philpem
I'm guessing the OP didn't have a logic analyser.

You'd need to grab the address and data buses, and synchronise that to a point
in the fetch cycle when the data is guaranteed to be stable.

It also means a lot more test clips to connect... A 16-bit bus with 16-bit
addressing would be 33 data clips and a couple of grounds. In a cardcage type
system you'd need an extender card to do this. Without an extender card you
need to solder in test pins or wires. Not something I'd want to do to a
40-year-old museum piece.

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jaak
There's a picture in the repo it looks like he is using a logic analyzer. He
also mentions the backplane is wire wrapped, making it easy to connect wires.

[https://github.com/stepleton/5100ExecutableROSDecode/blob/ma...](https://github.com/stepleton/5100ExecutableROSDecode/blob/master/dumpros_small.jpg)

