
Introduction to MIPS assembly language (2007) - jwdunne
http://chortle.ccsu.edu/AssemblyTutorial/index.html
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georgemcbay
Nice bit of nostalgia considering assembly courses at Northeastern University
were MIPS/SPIM when I took them back in... 1992-ish? Was an easy-A class
because I had been programming in 6502 and then 68k assembly for years before,
but SPIM gave me great respect for the power of virtualizing a system you are
developing for.

And MIPS is still a great instruction set to learn the basics on.

~~~
bmadden
The intro systems class is still in MIPS with Gene Cooperman. Great
introduction to the domain.

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IvyMike
MIPS still has a small but strong foothold in the embedded world; for example,
the Cavium Octeon network processor family is based on MIPS64. That's why I
found myself writing MIPS assembly code most recently.

[http://www.cavium.com/OCTEON_MIPS64.html](http://www.cavium.com/OCTEON_MIPS64.html)

~~~
tptacek
I remember when large-scale multi-core MIPS was the impending next generation
of network processing technology; at the time, architectures specialized to
packet processing seemed promising, but they seem less so now. What's the
current state of play with X64 vs. custom MIPS?

Cavium was not yet sharing eval parts when I left this field, just a bit
before Intel cancelled their NXP line (which was fun to play with).

~~~
lplplplplp
I work on both.

Intel is closing the gap with their DPDK, but Cavium creams them on clock-by-
clock and on cost of goods.

Cavium Octeon chips currently scale to 32 cores at 1.4Ghz, but with ZIP, GZIP,
AES, SHA1, etc coprocessors running at 800Mhz. All cores share a fast,
coherent unified L2.

One of the key advantages of the Octeon architecture is their hardware work
scheduling unit. This is essentially a highly programmable hash engine on
packet fields (with software-only bits for software classify-then-reschedule).
The idea is to ensure that no packets with identical hashes are in flight on
any core at the same time.

If programmed correctly, this work scheduling prevents data structure
contention, which is particularly problematic when you scale to 32 (and next-
gen up to 48 [then I believe to 64] cores).

The chips also support direct packet transport (XAUI, SGMII, etc), rather than
requiring transport across PCI-e. Each of these ports can be programmed
separately, so you can use switch-specific goofy encapsulation modes (Broadcom
HiGig2, Marvell DSA, etc) to support very quick traffic <-> physical port
mappings.

I should also mention that Cavium scales down very well, all of the way to
configurations like 2 cores at 400Mhz for PoS, SOHO usage, and such. So it can
be an attractive architecture to target.

Finally, Octeon family MIPS64 has a lot of MIPS64 extensions, like branch on
bit, posted atomic operations (e.g. statistics, where you don't care about the
value, you just want to += 42 it), pop count, fast bitfield subfield extract,
etc.

~~~
nkurz
That's one of the highest quality first comments I've seen yet. Thanks for
signing up, and please stick around.

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joveian
MIPS is a really fun assembly language to learn IMO. I liked the book See MIPS
Run by Dominic Sweetman.

~~~
davidw
I bought that once on a whim, when I worked a few blocks away from Powell's
Technical Books, back when that was its own entity. Never really had the
chance to do anything with it though.

What are MIPS processors used for these days?

~~~
georgemcbay
A lot of routers still use MIPS, and a fair amount of special purpose embedded
systems. I still have a few now somewhat aging MIPS SoC development boards
from chumby, though we never put out a MIPS-based product.

Not a lot of general purpose use anymore since the golden age of the
SGI/N64/PS2/PSP.

~~~
davidw
I have this vague recollection that for a while, MIPS was sort of in the
running against ARM for more things, but has now been pretty much completely
squeezed out of certain markets, like phones.

~~~
brigade
It wasn't really ever in the running for phones/tablets; there were some cheap
no-name Chinese devices using MIPS early on but now they all use Rockchip or
Mediatek SoCs. Imagination did buy MIPS with the stated goal of pushing into
this market, but it's truly too late.

Really, the only growth left for MIPS is through China's government's
technology independence initiative in developing the Loongson/Godson CPUs, for
which they licensed MIPS. A Loongson powers the laptop that RMS uses.

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CSDude
We learnt MIPS and we even implemented a simple MIPS processor with Verilog,
it was simple, but fun. Recommended to any starter.

~~~
eternauta3k
Check out this book, I started my MIPS CPU reading it:

D. A. Patterson, Computer organization and design: the hardware/software
interface, 4th ed. Burlington, MA: Morgan Kaufmann Publishers, 2009.

~~~
pmtarantino
Same for me. In our starter courser about processors, we were based on
Patterson book and work with MIPS + Verilog.

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capkutay
I saw this posted on HN awhile back and thought it was very cool:

[https://news.ycombinator.com/item?id=7272652](https://news.ycombinator.com/item?id=7272652)

Or direct link to the actual project: [http://yasp.me/](http://yasp.me/)

If you're interested in assembly but don't want to learn it with tools that
seem old (qtspim), yasp gives you a nice web ui to step through your assembly
code.

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ticktocktick
MIPS was fun to learn. Its instruction set is not nearly as gnarly as x86 or
ARM.

~~~
mikevm
Probably because it's not as popular. Given enough popularity, anything will
start deviating from its originally clean and pure design and turn into a
monstrosity...

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yeukhon
Shameless plug:

I did a basic tutorial for my class when I took computer architecture. I think
I got most of the basic stuff right. Probably some mistakes and lack of
insight how stack works at the time I was writing the tutorial. Correction is
welcome.

[https://github.com/yeukhon/mips](https://github.com/yeukhon/mips)

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ausjke
I love MIPS, wish it did better in the commercial side.sigh.

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JOnAgain
We learned MIPS and wrote a compiler for it. This was in 2002, so the compiler
was in Java. Still a lot of fun. What were those two tools? LEX and YACC?
Nostalgia.

(Had to look those two up, I remembered them as LACC and YEX)

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LazerBear
Believe it or not they still teach MIPS architecture and assembly in some
universities (Technion, Israel for example).

~~~
boombip
Also teach it still at Waterloo, Canada.

~~~
cbhl
In the CS department, they do teach a limited subset of MIPS with a Java
simulator. But the Engineering labs switched from m68k to ARM about two years
ago despite the latter having a much more complex instruction set because of a
large hardware donation. :(

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pjmlp
Very nice introduction! MIPS assembly was part of my OS II course at the
university back in 1997.

Never used it afterwards.

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cpeterso
Embedded device company RT-RK has graciously contributed their MIPS JIT to
Mozilla's SpiderMonkey VM. Open source is beautiful. :)

[https://bugzilla.mozilla.org/show_bug.cgi?id=969375](https://bugzilla.mozilla.org/show_bug.cgi?id=969375)

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Rzor
In today standards learn MIPS can be a good bridge to x86?

~~~
tptacek
Not really. If you believe that RISC is a good way to learn X86 by breaking
you in on assembly language in a strict load-store, simple addressing-mode
context, then ARM is a more reasonable first ISA to learn.

Many thousands of teenagers picked up X86 (and X86 protected mode!) from
nothing more than the MASM Bible during the 1990s, so rather than
overcomplicate things, I might just say "don't let yourself get intimidated"
and dive right into X86.

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afsina
Just a fun fact. Both Dart and Go support MIPS.

