
Chipforge opensource foundry [pdf] - baybal2
https://github.com/leviathanch/SITCON/blob/master/ORConf-20180921.pdf
======
Confiks
It's awesome people are working on this. Their progress is unfortunately is
pretty hard to follow or even support.

Their low-tech process steps:
[https://github.com/libresilicon/process/raw/master/process_s...](https://github.com/libresilicon/process/raw/master/process_steps/process_lowtech/process_lowtech_steps.pdf)

Lightning talk during the 34c3:
[https://media.ccc.de/v/34c3-9256-lightning_talks_day_2#t=178...](https://media.ccc.de/v/34c3-9256-lightning_talks_day_2#t=1784)

For an idea of how you could build transistors in your (admittedly pretty
large) basement:
[https://www.youtube.com/watch?v=TrmqZ0hgAXk](https://www.youtube.com/watch?v=TrmqZ0hgAXk)

HN thread with article about a home-made litographically-fabricated IC:
[https://news.ycombinator.com/item?id=16955549](https://news.ycombinator.com/item?id=16955549)

------
jimmyswimmy
I wish I could be pleased. Summary:

\- they are offering a 1 um process

\- process specs contains very little information and a scary number of "(??)"

\- test wafer specs are at
[https://github.com/chipforge/PearlRiver](https://github.com/chipforge/PearlRiver)

\- classically they have built (or will build?) a ring oscillator

\- no results published for test wafer measurements

\- again NO test data published

\- fab is a space at Hong Kong University of Technology

\- university fabs are often run on terrible equipment and by (to put it
generously) trainees

\- every time the university trainee operator changes you're probably
qualifying a new process on your design (yes this is a bit snarky)

Based on my experiences getting stuff out of a university fab "process"... I'd
rather sign the lot of NDAs and pay the money. Wait time might be faster out
of a production fab, and you can usually bank on the process being followed.

~~~
baybal2
In their defence, the sole fact that they actually managed to get started is
already a miracle.

Whatever they present now, is not even "stage 1" of what it is to become once
they will get any much substantial cash flow.

Their long term goal is to get to 180nm, or with a stretch to 130nm.

How they will get there without an actual fab, you may ask? The amazing thing
is the fabs are actually there: HK has a number of _abandoned_ fabs built up
to nineties technology level. They were once built by no name electronics
companies in nineties, but they all went bust during the Asian crisis. And HK
never managed to emerge as a player in semiconductors.

HK government is facing a dilemma, they have to do something with them, but
bulldozing a FAB, even a nineties era one, is not an option. And here the
Chipforge comes.

~~~
aeontech
> HK has a number of abandoned fabs built up to nineties technology level.
> They were once built by no name electronics companies in nineties, but they
> all went bust during the Asian crisis.

This is __absolutely__ the most cyberpunk thing I've read all year. Truly, we
live in the future.

A question arises - how much work would it actually be to bring up a fab
that's been dead for several (much less a dozen) years? Wouldn't the fab
basically need to be ripped apart and completely refurbished by now? Or are
the most important pieces fairly immune to physical degradation when abandoned
without regular ongoing maintenance?

~~~
baybal2
Quite a lot, but still incomparable to doing it from scratch. FAB require very
unique equipment, not used in any other industry. Like water filtration plants
that can make ultra pure deionised water in tenths of cubic metres per hour,
process gas recycling plants, industry specific automation equipment, etc

Even a nineties tech level, a FAB still costs a megaton of money.

The most unique proposition here is that a prospect of getting an actual FAB
with a lot of automation, and not a laboratory coaxed into manufacturing role
is within the grasp. You can't have that anywhere else in the world.

------
leviathanch
Hi all. I'm leviathan, the guy from the lightening talk and the talk here:
[https://youtu.be/kiTcaRqzOmY](https://youtu.be/kiTcaRqzOmY)

In fact you really can get factory buildings basically for free from Hong Kong
government because they don't know what to do with the building, but there is
also a fab which actually is still in use (not heavily though) We're in talks
with some of the folks who know the owner of the fab and are having a meeting
with him very soon.

They actually have automation of the production line to a certain degree, so
we can most likely stem it if we can get two more members into the team.

For now we are just planning the layout and mask set and making sure
everything is correct, so that we can provide reliable measurement data in
order for you guys to start designing.

Since the HK dollar stays for ages already on 8HKD ~ 1USD but the Reminbi is
getting more expensive, we will at some point be cheaper producing here in
Hong Kong.

You can however just sign NDAs and shove the money up into the ... wallets ...
of big companies like SMIC.

If however you wanna be sure that there are no CIA backdoors sneaked into your
mask set I'd suggest our service.

I also accept BitCoins BTW as payment for the chips ;-)

------
ChuckMcM
I think the vision of creating an open set of processes and standard cells
that every foundry could offer is a good one, but they aren't particularly
motivated to sign up.

I am not confident it will motivate the foundry that this will get any
additional customers or will (as a process) be able to fill extra capacity.

That said I tried briefly to get some folks together to buy the old Atmel Fab
building as a working fab post Microchip acquisition (as I recall it was a 1u
fab) but people were talking 10's of millions which wasn't what I was thinking
especially since I believe the plan of record is (or was) to just scrap it
anyway.

~~~
baybal2
Wow, any background info on that?

~~~
ChuckMcM
On what? The increasingly short supply of fabs in the Bay Area? Apple bought
Maxim's 6" line, Microchip closed Micrel's old 6" line. Intel pretty much shut
down everything they had in the early 2000's (there are data centers now on
the land previously used for the fabs) I am pretty sure that Zilog used to
have an R&D Fab over on Bubb road (not sure what happened to it).

I started on the quest because I like to wander around the various auction
liquidation shops in the Bay Area which often clean out a building and just
sell all the gear they pull out for pennies on the dollar (the recent round of
biotech closings lead to lots of refrigerators and incubators and microscopes
and such). As I saw 4" and 6" wafer equipment go through these places I asked
"What would it take to 'rescue' one of these facilities intact?" (basically a
clean room with a full set of machines inside). And made inquiries.

Occasionally I would know someone on the inside who can route my query to the
right person but if not one typically ends up at either the corporate
development group or the corporate assets group. The sad reality is that the
land/space is more valuable than a working, low volume, semiconductor line for
'older' processes.

As a result you have to pay the land use cost rather than the disposal cost
and it really isn't an economical sort of thing at all (you'll never be able
to make back the money you invest even if you sell the chips). And what that
means is that even when you have friends that think it would be 'neat' and
could fund such an effort, the math just doesn't pencil out.

If you run at the problem the other way and offer to buy all of the gear, and
basically reconstruct the line in a new location, then you have to build a
clean room, get a bazillion permits for the chemical storage, build a LNOX
plant, and pay to upgrade power to support what the fab needs. Again, the math
doesn't pencil out.

What that experience taught me was that in the Bay Area at least, you're not
going to be able to purchase/save a fab that the owner no longer wants for any
sort of a reasonable price. This is especially true if all you intend to do
with it are low volume and open source chips in it.

~~~
namibj
Did you consider using modern e.g. DLP chips or so for a maskless fab? It
would not work on too modern nodes anyway, just due to the restriction to ~405
nm by the aluminium reflectors on the chip turning i-Line and deeper into more
and more heat you can't get away from the chip. 180 nm seems to be what one
could hope for with an immersion stepper at 405 nm without too much trickery,
but the next one up should be possible with dry exposure. Hit me up if you
want help or so with a maskless, sane-priced-chips yielding fab. There are
just so many applications once you have the same price per chip at 1 or 5 or
100. Things like custom hardwired monolithic analogue compute could enable
e.g. micro drones and likely lots of other stuff if it's cheaper to use some
tool to generate the analogue or mixed circuit that will replace all logic
parts on some circuit board, leaving only power handling components and those
that don't work inside an IC. Maybe the freedom to create a monolithic version
of an HB100 radar module, allowing a heterodyne design due to the savings from
integration, with the needed experimentation being possible just because
iterations are neither expensive nor long (comparable to Chinese PCB
manufacture, so something under a week).

~~~
ChuckMcM
This is a good thought. The short answer is of course no, I didn't because I
was looking at preserving an existing line rather than build a new one.
However I think there is a lot of merit in penciling out a closed cell[1]
(mostly) dry line. The cost to develop the equipment would be pretty high
though, perhaps prohibitive relative to the ability to resell that gear.

[1] Where wafers are always in a closed container, no clean room required.

~~~
namibj
Oh, I very much meant using the chemical technology, and just replacing the
steppers in one of the lines with the maskless ones.

For the closed cell line, which problems are you seeing? Any special use cases
for making chips on a process that emphasizes uniquness so much? I mean, apart
from maybe being able to do AOI after the front of line processing to hard-
route metal around (presumed) defects, in order to reduce the cleanliness
requirements for actual monolithic wafers. I mean like if you have a 2D,
routing mesh of compute, and you need to worry about routers having defects
that tank your yield in wafer-scale chips, you can design the front of line
masks to allow wiring one or maybe even more clock delays into the mesh link
(without significant cost to the attainable frequency/minimum delay) and also
just not connect the link from one or more neighbors over (on the other side
of the defect router) to the defect circuity, so that routing between the
nodes around the defect one isn't impacted, and neither are any delay cycles.
The one node is broken, but it'd just be something a compiler would have to
work around.

Other things like hardwired crypto keys might be of use, or hardwired logic
for these <15 ppi very, very wide aspect ratio LED screens that are anyway
configured for some fixed text to scroll by. Or some analogue IC that is
detuned from theoretical values to compensate for the not-precisely-
manufacturable discrete capacitors (and inductors), as e.g. the needed
Q-factor/voltage of the resonance doesn't allow mechanical trimming components
to be used, as they'd induce corona discharge if close enough to not murder
the Q-factor.

Digital control is in nowadays even for fast feedback loops, but you can't
beat the latency of analogue PD controllers. Good luck compensating single-
digit MHz vibration actively with a piezo and e.g. optical interference
pattern contrast sensing with some photodiodes like done with 4 of the latter
for a CD drive. I'm confident that the power driver is a harder part, given
that you want it to follow lumped-element behavior and not distributed-element
effects, so you can cope with random noise of sufficiently low frequency to
fall within the bandpass range of the control circuity.

------
phkahler
If DIY chip fabrication takes off even a little, I hope they use safer
chemicals than the industry did back on those nodes. Safety and simplicity
should be top priorities IMHO which would also help such a thing proliferate.

I like the idea of having a local fab for my own designs. Even if they're not
that complex.

~~~
juliangoldsmith
Are there currently safer chemicals available for semiconductor fabrication?

The dangerous part is stripping the oxide layer off the wafer. That's
currently done with fluorides, which are really nasty to work with.

------
traverseda
Their website

[http://libresilicon.com/](http://libresilicon.com/)

