
Intel Confirms 8th Gen Core on 14nm, Data Center First to New Nodes - richardboegli
http://www.anandtech.com/show/11115/intel-confirms-8th-gen-core-on-14nm-data-center-first-to-new-nodes
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dogma1138
The focus in this thread appears to be on the wrong thing. Intel has
introduced a new process here for die interconnects
[http://www.intel.com/content/www/us/en/foundry/emib.html](http://www.intel.com/content/www/us/en/foundry/emib.html)

This can be very interesting especially if this can be expanded to other
products. TSVs increase the pricing of certain products by a substantial
margin and have pretty high failure rates, they also increase the internal
resistance of components and can cause thermal issues.

HBM and 3Dxpoint built on EMIB can reduce the price of these components
substantially, it can also make it viable again to split the dies of the IGP
and the CPU allowing Intel have SKUs with different IGP configuration
including EDRAM/SRAM without having to have multiple die designs.

~~~
wmf
I don't think the cost of multiple die designs is significant for Intel since
they amortize it over very high volume. (For example, they updated the
Celeron/Pentium/i3 line to Kaby Lake even though customers probably won't even
notice.) EMIB looks like it would always be more expensive than a single die
or MCM so I don't see the benefit for consumer chips.

~~~
dogma1138
EMIB allows you to integrate dies that are built using different processes
which means that you don't have to wait for all of your processes to align.

If you can't produce reliable SRAM at 10nm no problem, if you want to
integrate FPGAs that are build using a different process no problem, you want
to scale up the same basic core design of 4 core clusters again just make the
same small dies and interpose them based on market demands. This will allow
Intel to sell Xeon SoCs/CPU's with 128 to 256 core which isn't viable if you
put them all on the same die, it also means that they don't have to disable
cores for different SKU's now if they want to make a 10 core CPU they just put
10 cores and not 12 with 2 of them disabled.

People also overlook the cost of the masks, a set of master masks cost a lot
of money even their copies cost a small fortune and as we go into more and
more intensive processes as far as radiation goes the lifespan of these masks
shrinks in an ever increasing pace.

~~~
ethbro
I'm assuming this might also mean they can leverage their legacy fabs to a
greater degree for non-critical components in competitive spaces? That seems
like a huge advantage.

It sounds like a move from "Do we assume the next node will be ready for our
most important chip in X years?" to "What parts of chips is the next node
currently ready for?"

Fabbing smaller dies on lower-yield, leading edge processes would also be
nice. Curious what the trade-offs will look like in terms of power/thermal vs
a monolithic die design.

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throw2016
The $64 G4560 making the i3 redundant, Kabylake X, and now this. This seems
like a meltdown at Intel.

I think there is a real risk if AMD deliver superb performance and value with
Zen, Intel will lose a little bit of the shine and a lot of consumers will not
perceive them as innovative anymore.

The sheer number of skus itself shows Intel has been on a bit of a downward
spiral towards becoming something of a 'marketing company'. Kabylake has
negligible to no gains over skylake making it a pure branding exercise. Risky
move for reputation. Time to focus on innovation and value.

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orik
wow -- bad news.

Intel already failed to get off of 14nm with Kaby Lake, and now they're
pushing it back another cycle?

~~~
kogepathic
I can't wait until AMD releases Ryzen in March. I haven't owned an AMD system
since socket 939, but Ryzen pricing is leaking now, and it looks like it's
going to significantly undercut Intel's current prices. [0]

Let's hope this encourages Intel to discount their current and future chips.
More competition is always good for the consumer.

[0] [http://m.hexus.net/tech/news/cpu/102322-uk-us-prices-
amd-r7-...](http://m.hexus.net/tech/news/cpu/102322-uk-us-prices-amd-r7-ryzen-
processors-spotted)

~~~
samfisher83
Lets hope the Ryzen is the real deal.I mean the i7-3610 is just as good as my
i7-6700hq which was like 3 or 4 years ago. Without competition we are in
trouble. I remember when Athlon64 came it made Intel come up with core2duo
which was a quantum leap from p4.

~~~
sqeaky
I agree with you that competition is important. I disagree that the
improvements in generations of i7s are as minor as they superficially seem to
be.

For at least my task, compiling large amounts of C++, the difference between
the different i7s is huge. I get a new expensive laptop every two years (and a
cheaper machine for portability or other purposes each off year). I have a
high end 1st, 2nd, 4th and 6th gen i7 each machine is measurably faster with
the oldest machine taking almost 10 minutes and the newest taking just about 2
minutes to build the same codebase.

~~~
dman
Which is your latest i7 chip? Did you switch from hdd to ssd somewhere along
the way? What are the core counts with each generation ?

~~~
farresito
Do SSDs make any noticeable difference? I think I once read a post (maybe from
Joel) where they bought SSDs and the difference in compilation time was
negligible.

~~~
dman
At work my compile times went down by 70% on switching to a SSD.

~~~
sqeaky
What language? How big of a build? Is your build too large to fit in RAM?

~~~
dman
C++ on windows. Lets just say that the number of things hooking into file
modified notifications (anti viruses etc) are largely the culprit.

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deepnotderp
EUV pushbacks from Applied Materials and ASML have pushed 10nm back quite a
bit.

I honestly don't see Moore's law progressing beyond 3nm, maybe even stopping
at 7nm or 10nm.

~~~
luhn
Well, Moore's law is already dead. Intel missed the mark last year.

As far as shrinking transistors further, isn't 7nm the physical limit?

Edit: I'm mistaken. Transistors as small as 1nm have been developed.
[https://en.wikipedia.org/wiki/5_nanometer#Technology_demos](https://en.wikipedia.org/wiki/5_nanometer#Technology_demos)

~~~
Analemma_
When transistors stop shrinking- whether that's at 10, 5 or 7nm- the limit is
going to be economic, not physical. Intel probably could make a chip with 1nm
transistors; the question is whether it would ever deliver a positive ROI,
since

\- the R&D and the fabs would probably cost a zillion dollars, in a shrinking
market for high-performance CPUs

\- yields would probably be very low, even as the process matured - this
problem is becoming more and more pronounced with the latest generations

\- the advantages over the current chips would not be great; note svantana's
comment about diminishing returns with the most recent process shrink

~~~
curiousgal
>a shrinking market for high-performance CPUs

It is??

~~~
AnimalMuppet
Well, for chips that are, say, twice as fast as the best current chips for
three times the money, I suspect that the market is in fact shrinking, because
_for most people_ , current chips are good enough.

There's still plenty of people who want more speed badly enough to pay for it,
but my impression is that there aren't as many as there used to be.

~~~
ethbro
Or in other words, the market for single-chip performance is shrinking.

The hyperscale folks care about how much physical space given performance
takes, but that's likely more energy/performance than chipcount/performance
constrained.

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wmf
It's kind of odd that AnandTech doesn't mention Coffee Lake. These rumors have
been going around for months.

