

MSR Commits Reconfigurable Computing Port Into NetBSD - signa11
http://mail-index.netbsd.org/netbsd-announce/2011/01/26/msg000121.html

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Aegean
I've researched this topic for a while in university, and the idea was to keep
a general purpose FPGA as a programming device, and load preconfigured images
to it when needed. For example load up an encryption module when encryption
intensive operations took place, or load a video encoder/decoder whenever
needed.

There were a few problems:

* Each FPGA vendor has its own architecture and such a technology requires momentum from these vendors. A 3rd party cannot do much about it.

* Dedicated ASIC circuits often perform better with less power consumption. So keeping a general purpose FPGA may not bring sufficient benefit to develop the technology.

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count
Would it be possible to blend something like this into, say, GCC, so that when
you compile your code, easily hardware accelerated sections (for whatever
definition of that you like) can be generated into FPGA loadable files and
used at runtime?

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Aegean
Yes I thought about this idea. For example it would be nice to have a .fpga
section in the ELF files and one could load images as part of OS file
execution.

It is a nice idea and I would try to push this as a technology if I was Xilinx
or Altera. But it requires that momentum to become a reality because this
creates a new model and ABI for software - one that doesn't exist today.

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signa11
Project page can be found here: <http://research.microsoft.com/en-
us/projects/emips/>

