
StoneCutter: A Very High Level Instruction Set Design Language - matt_d
https://doi.org/10.1145/3387902.3394029
======
chrisaycock
Interestingly, the paper states that StoneCutter uses LLVM to output
Chisel[1,2]. However, Chisel has its own compiler framework called FIRRTL[3].

It seems the reason for LLVM as a step before getting to Chisel is the
optimization passes; the paper specifically lists "loop invariant code motion,
instruction combining, control flow graph simplification and constant
propagation."

FIRRTL has optimizations as well, but that paper states: "The three major
optimization transformations implemented are constant propagation, common
subexpression elimination, and dead code elimination."

[1] [https://www.chisel-lang.org](https://www.chisel-lang.org)

[3] [https://people.eecs.berkeley.edu/~krste/papers/chisel-
dac201...](https://people.eecs.berkeley.edu/~krste/papers/chisel-dac2012.pdf)

[2] [https://people.eecs.berkeley.edu/~magyar/documents/firrtl-
ic...](https://people.eecs.berkeley.edu/~magyar/documents/firrtl-iccad17.pdf)

~~~
GregarianChild
The StoneCutter paper is a bit light on details. Am I right in thinking they
are exploiting LLVM's conversion to SSA form, as a natural starting point for
translation to RTL? It never occurred to me, but SSA might be a good normal
form for thinking converting software into hardware.

Apart from that, I'm always shocked by the number of intermediate languages
the processor design community uses. In this case:

    
    
       StoneCutter -> 
       LLVM-IR -> 
       Chisel -> 
       Scala -> 
       C++/Verilog
    

There should be a lot of friction in these many steps.

