
23 years of software side channel attacks [video] - cperciva
https://www.youtube.com/watch?v=UNoP3qVyU8w
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cperciva
Slides, for anyone who wants to read them separately from the video stream:
[https://2019.eurobsdcon.org/slides/23%20years%20of%20softwar...](https://2019.eurobsdcon.org/slides/23%20years%20of%20software%20side%20channel%20attacks%20-%20Colin%20Percival.pdf)

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saagarjha
Being able to "roll back" changes to caches came up a number of times during
the talk and afterwards. Some processors already have this ability in the form
of transactional memory, though I'm not sure if it extends to caches. Would it
be possible to use something like this to help prevent side-channel attacks of
this form?

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cperciva
It's possible that some of the processor design elements would be related.
"Transactional memory" basically means keeping pending writes in a buffer
until the transaction is committed; but that's only a small part of what you
would need for security, since you also need to hold _reads_ in a "pending"
pool before they enter the cache.

