
Precursor: Mobile, Open-Hardware, RISC-V System-on-Chip Development Kit - bpierre
https://www.crowdsupply.com/sutajio-kosagi/precursor
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bem94
The RISC-V core in question is the VexRISCV core[0]. It comes in two flavours
depending on the kind of FPGA[1]:

\- 100 MHz VexRISC-V, RV32IMAC + MMU, 4k L1 I/D cache on the Xilinx FPGA

\- 8 MHz VexRISC-V, RV32I, no cache on the Lattice iCE40UP5K FPGA

0\.
[https://github.com/SpinalHDL/VexRiscv](https://github.com/SpinalHDL/VexRiscv)
1\. [https://www.crowdsupply.com/sutajio-
kosagi/precursor](https://www.crowdsupply.com/sutajio-kosagi/precursor)

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merricksb
Posted first here:

[https://news.ycombinator.com/item?id=24527846](https://news.ycombinator.com/item?id=24527846)

