
ForwardCom: Proposal for forward compatible instruction set architecture (2018) - drudru11
http://www.forwardcom.info
======
amluto
> There are no dynamic link libraries (DLLs) or shared objects. Instead, there
> is only one type of function libraries that can be used for both static and
> dynamic linking. Only the part of the library that is actually used is
> loaded and linked. The library code is kept contiguous with the main program
> code in almost all cases. An executable file can be re-linked to update a
> function library or to adapt the program to a particular hardware
> configuration, operating system, or user interface framework.

So compiled code is forward compatible with new CPUs with longer vector
registers, but it's not forward compatible with new libraries?

I find it a bit sad that people put so much effort into designing new ISAs
that have nifty features, but then they make them so different from current
ISAs that they basically can't run currently existing software.

~~~
gpderetta
This is Agner Fog pet architecture. It has zero chances of ever being
implemented. At best is to be considered a wishlist from a well known assembly
programmer.

~~~
MrXOR
It's only the beginning:
[https://github.com/ForwardCom](https://github.com/ForwardCom)

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peter_d_sherman
Selected Excerpts (with my comments):

"o An instruction can do multiple things, but only if it fits into the
pipeline system. There is no need for microcode."

No microcode? Sign me up!

"o The ForwardCom design is scalable to support small embedded systems as well
as large supercomputers and vector processors without losing binary
compatibility."

Unbelievably forward-thinking!

"o The instruction set is fully orthogonal."

Aesthetically and mathematically pleasing!

"o Array loops are implemented in a new flexible way that automatically uses
the maximum vector length supported by the microprocessor in all but the last
iteration of a loop. The last iteration automatically uses a vector length
that fits the remaining number of elements. No extra code is needed to deal
with remaining data and special cases. There is no need to compile the code
separately for different microprocessors with different vector lengths."

Utterly brilliant! Genius level intelligence!

Well, what do you expect? Agner Fog is a LEGEND in the assembly language
community...

------
Hello71
I've only skimmed it, but it smells a lot like Khaled Omar's "IPv10" draft:
[https://tools.ietf.org/html/draft-omar-
ipv10-11](https://tools.ietf.org/html/draft-omar-ipv10-11).

~~~
saagarjha
How so? This is an ISA description, while the other document is for an IP
protocol.

