
TSMC and Graphcore Prepare for AI Acceleration on 3nm - rbanffy
https://www.anandtech.com/show/16040/tsmc-and-graphcore-prepare-for-ai-acceleration-on-3nm
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jonplackett
This must be scary reading for Intel, still battling to make anything decent
at 10nm (which I know is more like 7nm TSMC, but still, this is another 2
steps on from their 7).

It's a bit worrying how all this innovation, with the possibility (perhaps
even likelihood) of completely cornering the market, is all in one country,
that is very close to another country, that doesn't want it to be its own
country.

~~~
CarbyAu
The US invaded for oil.

What will it do for chip production?

~~~
breatheoften
Lose its competitive advantage, slowly consolidate remaining assets into
private hands with borderless migration capacity, elect a government composed
entirely of conman, and five to ten years from now, begin losing every violent
international confrontation that it tries to start?

~~~
CarbyAu
I agree with everything but...the losing of every violent international
confrontation.

Maybe you'd lose against other modern, well integrated forces. But there is a
lot of the world whereby forts, trenches, gun emplacements are still their
best. And they are simply butter to the modern military knife.

Barring major catastrophe,(ww3, another american civil war, a pandemic that
kills large % of younger population etc) it will take far more than 10 years
to decline past that point.

The Iraq Military Exercise (I can't call that a war.) is a clear example of
that.

~~~
raducu
What war could the US start without the usual and immediate involvement of
Russia, China or Iran -- I mean, except for a war with its own citizens that
is.

The US lost the Afghanistan war, is slowly losing Irak to Iran, lost all face
and is getting humiliated in Syria, failed at preventing Russia impose its
presidential candidate, is alienating its european allies (see the Iran
sanctions debacle), is supporting the savage Saudi Arabia -- who is losing the
war in Yemen.

~~~
bioipbiop
The US won Afghanistan handily, they just didn’t know what to do with it when
they had it. I think America would have been better off placing Afghanistan
under a military governor for a few years while they built up the country’s
institutions.

~~~
raducu
Most powers make the same false assumptions that they "easily won" an
insurgency/guerrilla war.

No you didn't win anything, you temporarily held territory, you wasted
enormous resources, and were in fact beaten by goat herders in the end.

Without putting the whole country in a concentration camp and re-educating for
20 years and without providing an alternative economic model, a central
administration in Afghanistan is irrelevant wether you do it for "a few year"
or decades.

~~~
bioipbiop
I think you’re conflating Afghanistan with Vietnam. America never fully
committed to Afghanistan as they did with Vietnam. From the very outset they
tried to do it on the cheap by relying heavily on the northern alliance.
Subsequent to the invasion, America was far more interested in pursuing the
Iraq war, so Afghanistan quickly became a backwater.

This meant that America became heavily reliant on local war lords (some of
whom had dealings with the Taliban) to ensure security and maintain order.
This undermined the government they were trying to build in Kabul and
contributed to a culture of corruption. None of which endeared the common
afghan to their newly formed institutions. The Taliban exploited these
weaknesses with classic insurgency tactics and gradually took territory from
the weak central authorities.

This was all entirely avoidable, America just didn’t stay focused on the
mission.

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fluffy87
When will GraphCore enter MLPerf and let the industry verify their claims?

Until then, it’s vapor ware. I’d refer to this comment
[https://news.ycombinator.com/item?id=21530810](https://news.ycombinator.com/item?id=21530810)

~~~
fluffy87
GraphCore has been claiming to be a generation further than the comptetition
for over 3 years already.

This is easy to do when you don’t have to use any standard benchmarks (MLPerf)
and do not allow anybody to verify any claims.

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neatze
I read everything I could find, even contact MS to get demo for Graphcore IPU,
no success, so in my perspective something smells fishy, because, you can rent
for one minute quantum computer, but you cannot get access to IPU's, only
availble access is 10K a month.

~~~
fluffy87
I don’t even need access. Just need verified MLPerf results.

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agumonkey
I'm honestly asking the question, where does the compute power go these days ?

is it big data analytics from the largest socnets ?

~~~
redisman
ML is enabling tons of new sinks for compute in addition to all the old cloud
and supercomputer workloads

~~~
agumonkey
What are the usual use of ML right now ?

I mostly think about ML for self driving vehicles but I'd like to know where
else it's applied.

~~~
david-gpu
Recommenders, speech to text, text to speech, page ranking in search engines,
fraud detection, video analytics, content filtering (from dick pics to
censoring news), etc.

~~~
IanCutress
Training vs inference. Training data sets is expanding 3-10x every 6 months.

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not2b
Getting very close to the end now. The nearest-neighbor distance between Si
atoms in a crystal is 0.235 nm, so a feature with 3nm width is 12.7 Si atoms
across. It is amazing that this can be done, and the physics are increasingly
weird at this level of scaling.

~~~
zionic
>so a feature with 3nm width

 _Sigh_ , another post... another top comment not understanding that marketing
name =/= any actual feature size anywhere on the chip.

I've been reading threads like this for 10+ years now, and somehow this
knowledge has still not permeated the tech culture here and on reddit.

~~~
variaga
Once upon a time (the "Dennard Scaling Era") VLSI circuit design used the same
relative geometry at different "feature sizes" \- all dimensions of the
design(wire width, wire spacing, gate length, gate pitch, ..., etc.) scaled by
the same amount from generation to generation, so it was possible to
completely specify the transistor layout with a single dimension (generally
called 'L'), and derive all other measurements from that as a multiple of 'L'.
Transistor density was proportional to 1/L^2.

The measurement that was used originally for 'L' was the gate length.

As designs shrunk below 40nm, it became impossible to shrink _every_ dimension
proportionally. In particular, for planar silicon, gate length stops shrinking
around ~30nm, but other things could still shrink. This meant that transistor
density could still increase, but the relative geometry of
wires/gates/spacing/etc. had to change, so it was no longer possible to
specify the full geometry with a single number.

But people liked the single number as a handy way of comparing processes, so
marketing kept using it as a way to compare processes. The way they decided to
do that was mostly to try and keep the proportionality between the transistor
density of a process and 1/L^2.

To the extent a "feature size" number of a process means anything, it means
"the relative transistor density of this process is equivalent to what you
would get if you had used the old (>40nm) geometry, and shrunk 'L' to the
specified feature size". Even that relationship has degraded in recent years -
now it's more like "we calculate the new feature size as the size of the
previous process divided by sqrt(2)".

Regardless, as stated in the parent, there is no single dimension of any
recent process that corresponds to the '3nm' number.

There's lots of resources online that describe this, but for an overview, you
could start here (describes pre- and post-Dennard scaling):
[http://www.eng.biu.ac.il/temanad/files/2017/02/Lecture-4-Sca...](http://www.eng.biu.ac.il/temanad/files/2017/02/Lecture-4-Scaling.pdf)

~~~
ur-whale
Thanks for that explanation.

What would be even more useful is an actual answer to the underlying question
the OP seems to be making: how much further until one of the many dimensions
you are talking about simply runs out of Si atoms?

In other words, however "made-up" the 3nm marketing number may be, physics
limits should still dictate a lower bound for it, and the OP seems to be
wondering what that is.

~~~
garmaine
There isn't an answer to that. We've already hit physical scaling limits for
the old style (>40nm) of transistor manufacturing. Each successive generation
since then has employed new tricks to improve performance, and each jump in
performance is labeled with a smaller process node size number. This can keep
going so long as there are more optimizations to be found. And since not all
process optimizations involve shrinking dimensions, it's not necessarily the
case that we can predict from physical principles when this will end.

For example, stacked chips are increasingly being used but are fundamentally
limited by heat transport. Maybe when we get into sub-1nm "sizes" the process
nodes will be defined by how well they transport heat out of volumetric chip
designs? Or we'll switch to twisted graphene superconductors for certain
components which increases efficiency without necessarily shrinking feature
sizes. Etc.

I'm just throwing those possibilities out. The point is we can't predict when
scaling will ultimately end.

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aoeusnth1
Is no one interested in the stats listed on the card? 200TFlops for 300W? That
is incredible power efficiency! What kind of connectivity solution is needed
to feed it?

~~~
ml_hardware
It's not that impressive.. The NVIDIA A100 has better efficiency: 312 TFlops @
400W for the same precision (FP16.32).

~~~
fluffy87
Also the A100 is cheaper, and it’s perf is verified by MLPerf.

GraphCore’s claims are just that, claims. Some of these have been debunked
already by people with access to the hardware (eg promised 10x speed ups were
more like 1x).

~~~
ml_hardware
Do you have a link to those results by independent researchers? I have also
been very skeptical of GraphCore’s claims (and have talked about it on reddit)
but haven’t had access or heard of anyone’s experience.

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jklein11
Does the manufacturing of these processors require EUV?

~~~
wmf
Yes, 5 nm and below uses EUV.

~~~
KorfmannArno
Is there a good and short (5 mins max) video explaining how EUV works and how
the produced chip works?

~~~
tedsanders
It's 21 minutes, not 5 minutes, but here's a lecture by Chris Mack on EUV from
2013. He's fantastic. (Skip around or increase playspeed if you don't have
more than 5 minutes to spare.)

[https://www.youtube.com/watch?v=LHyV_-9JXu4](https://www.youtube.com/watch?v=LHyV_-9JXu4)

Chips produced by EUV work the same as any other chip. And even chips that are
made with EUV are only using EUV for the very finest features - they're still
using plenty of 'regular' lithography for the dozens of other lithography
steps.

~~~
KorfmannArno
I have way more than 5 minutes, just my attention-span is crippled.

------
Animats
3nm by 2022. Is anyone in the US even considering a 3nm fab?

~~~
ahmedalsudani
It’s well known that TSMC is the only company at that stage. Nobody else in
the world, let alone America, is close to 3nm.

~~~
xadhominemx
TSMC isn’t close to 3nm either... TSMC “3nm” is Intel 5nm. TSMC doesn’t get to
Intel 3nm for at least 4 years.

~~~
ahmedalsudani
Sure. But Intel 7nm isn’t TSMC 5nm ... and Intel isn’t at 7nm yet.

~~~
xadhominemx
Intel 7nm is better than TSMC 5nm

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steve_musk
Intel 7nm doesn’t exist, and TSMC 5nm chips have been in production for months
now.

~~~
xadhominemx
Yes I know...

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ur-whale
nm unit is not particularly telling us anything.

Watt/TeraFlop is a much more tangible way to understand why this is cool.

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wetpaws
Gentle reminder that 3nm is a meaningless marketing number that does not
represent neither the transistor size no element density, and it does not
correlate in any way with all other Xnm production of other companies.

~~~
doctoboggan
So what does it mean then?

~~~
Koshkin
According to Wikipedia [1], it refers to "the process' minimum feature size."

[1]
[https://en.wikipedia.org/wiki/Semiconductor_device_fabricati...](https://en.wikipedia.org/wiki/Semiconductor_device_fabrication#Size)

~~~
wetpaws
In many cases, like in Samsung case, it does not even refer to the feature
size, and just represents a generation of the tech process or some arbitrary
incremental improvements.

