
LLVM Patches Confirm Google Has Its Own In-House Processor - buserror
http://www.phoronix.com/scan.php?page=news_item&px=Google-Lanai-Architecture
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TheCoreh
Now, would it even make sense to merge into the mainline codebase of LLVM
backend code targeting a platform that noone else can test or use?

Is Google planning on eventually releasing this architecture publicly or maybe
licensing it to third party manufacturers, a-la ARM?

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Sir_Cmpwn
No, I don't think it really makes sense for LLVM to mainline an architecture
no one can use. I doubt they'll be on board with this.

~~~
verbatim
It's not exactly unprecedented. GCC supports mmix, which hardware doesn't even
exist for. (An educational platform from TAOCP.)

[https://gcc.gnu.org/backends.html](https://gcc.gnu.org/backends.html)

~~~
cmrx64
"Only has simulators" is _very_ different from "nobody can use". MMIX has
value.

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desdiv
This story has a little more info, including the chip's origin from Myricom:

[http://www.theregister.co.uk/2016/02/09/google_processor/](http://www.theregister.co.uk/2016/02/09/google_processor/)

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rurban
This LANai v11 RISC chip seems to be the successor of the LANai v7 and LANai
v9 chips described here:
[https://www.myricom.com/scs/myrinet/...ogramming.html](https://www.myricom.com/scs/myrinet/...ogramming.html)
for which the gcc toolchain already exists:
[https://github.com/myri](https://github.com/myri) Porting this to LLVM makes
more sense.

Nothing too interesting, as it doesn't use IBM's 7nm or Intel's 10nm chip
tech. Just a simple but parallel high-speed network chip, as used in the
Myrinet network cards. The old ones ran with 33MHz but very low latency.

Really exciting would be the Power8 based on IBM's new 7nm, which would
finally blow away Intel advantages on an fully open (and unbackdoored) design.

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cmrx64
Nothing about the POWER8 or IBM's process technology implies unbackdoored. I
can't inspect the factories, or their supply chain, or the HDL they used, or
the tools that processed the HDL. The only thing more "open" about POWER8 is
firmware in some deployments, and maybe licensing the ISA (if you have enough
clout/money to join the foundation, I can't find any licensing information at
all). RISC-V is more interesting in every way, with respect to openness.

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userbinator
_Lanai is a simple in-order 32-bit processor with 32 x 32-bit registers, two
registers with fixed values, four used for program state tracking, and two
reserved for explicit usage by user, and no floating point support._

Might as well be a MIPS. The fact that Google has suppoedly developed its own
CPU is interesting, but the architecture itself seems quite mundane.

Edit: comments on the article suggest it's the Myricom LANai, a NIC embedded
processor. Google may just happen have these NICs in their machines and want
to write firmware for them.

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vmorgulis
[http://www.phoronix.com/forums/forum/phoronix/latest-
phoroni...](http://www.phoronix.com/forums/forum/phoronix/latest-phoronix-
articles/851180-llvm-patches-confirm-google-has-its-own-in-house-
processor?p=851195#post851195)

It could be lanAI too...

~~~
eternalban
OT(?): reverse(Lanai) // todo: see if copying XXX cpu is OK

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WestCoastJustin
Must be funny working at Google and knowing the inside scoop (watching people
speculate). So, here is my wild speculation about a similar secret project.
There was a talk given by Dick Sites (from Google) [1, 2], where he talks
about performance monitoring across the Google fleet. Very technical and
useful if you are into monitoring (highly recommend it). A large part of his
talk is dedicated to issues and limitations with off-the-shelf CPUs. Given
that AWS has custom chips (talked about at Invent a few years back), why
wouldn't Google solve this issue too, they have the talent and money.

[1]
[http://www.pdl.cmu.edu/SDI/2015/slides/DatacenterComputers.p...](http://www.pdl.cmu.edu/SDI/2015/slides/DatacenterComputers.pdf)

[2] [https://vimeo.com/121396406](https://vimeo.com/121396406)

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wmf
It's already been posted in this thread that it's just a smart NIC evolved
from existing Myricom NICs. (Of course, my coworker was just telling me a
story about how John Cocke hid his RISC processor in a printer project.)

And Amazon's "custom" CPUs are 100 MHz faster Xeons.

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at-fates-hands
_but at least for Lanai it looks like a CPU used just internally and isn 't
something that is going to power the next generation of Android devices;_

How many times have we seen a huge corporation do something in house, then
release it for public consumption several years later? At this time, it will
probably stay in house, but if there is a revenue opportunity, trust me,
they'll release it.

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pyvpx
perhaps folks will now take 'intelligent' NICs more seriously than "we tried
offloading once and it went poorly so thanks but no thanks"

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ZenoArrow
I wonder if they'll be using RISC-V for the same purposes in the near future.

[http://www.eetimes.com/document.asp?doc_id=1328561](http://www.eetimes.com/document.asp?doc_id=1328561)

~~~
PeCaN
Seeing as Google partially sponsored RISC-V[1], it wouldn't really surprise
me.

1\. Indirectly, via ASPIRE Lab.

~~~
cmrx64
Google is also a member of the OpenPOWER Foundation (though they've done much
more with that). I don't think sponsorship is necessarily endorsement or
deployment plans -- it'd be nice if that were the case though!

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koder2016
If you are serious about your software...

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mpu
Hurray, no floating points!

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Nano2rad
Maybe there is no chip, could be they are implementing on FPGA or virtual
machines.

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Nano2rad
First part is lan second part is ai. It could be something to do with
artificial intelligence.

