
Chuck Moore's 144-computers chip is now available - blue1
http://www.greenarraychips.com/home/products/index.html
======
gruseom
Moore added this wonderful passage to his blog today. I think it captures
something of the specialness of the man:

 _GreenArrays is starting production of its 144-computer chip with an
accompanying evaluation board. Details at greenarrays.com. This is the result
of funding, testing and refinement.

On the lighter side, regarding my Five Fingers shoes: continued delight; more
miles of hiking. My gait is changing: shorter strides, less heel strike, less
toe-out. And I've not experienced any lower back pain. Somehow my soles are
less sensitive and I can walk barefoot more easily. _

<http://colorforth.com/blog.htm>

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TY
This is a very interesting product from the great Chuck Moore that needs a
"killer app" to take off. I wish I had time to invest in it...

What's interesting is how different this company is from the idea of a startup
that most of us here have in our heads. Just look at the team and try to
figure out what the average age of the company is:

<http://www.greenarraychips.com/home/about/bios.html>

I wonder if this has something to do with the fact that chip design requires a
lot of experience or the fact that these people just happen to be in great
Chuck Moore's professional network. Or likely both.

~~~
nadam
I think both. Plus consumer web applications and consumer smart phone apps and
social media apps are some kind of fashion among young people. (I am 35 years
old and even I feel the generational differences from younger folks a bit.)
Older folks are not so sensitive to fashions.

Edit: or maybe every generation have a love affair with the topic which is the
'next big thing' of their youth? Maybe in 2040 a social media startup will be
founded by old folks, while the young guys will be enhusiastic about something
completely different? My father is a mechanical engineer, I am a programmer,
maybe my son will have the profession regarding the 'next big thing'.

~~~
ebiester
Or, we have the domain experience of social and mobile. Many don't have the
domain experience of... say health care.

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wazoox
Reminds me of the wonderful connection machines of lore...
<http://en.wikipedia.org/wiki/Thinking_Machines_Corporation>

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Jun8
What, this thing costs $20! As a hardware novice (read dabbled with Arduino a
little), how hard would it be for me to create something useful using this
chip?

~~~
blacksmythe
It would be a significant effort to put a board together to do anything with
this, certainly more than the cost of the eval board if you place a value on
your time (and aren't looking at this just as a hobby).

Most people who might use this in a commercial setting would buy the eval
board first to try it out. That is probably what I would do even if this were
a hobby project.

~~~
GregBuchholz
Of course a student could try to find a QFN 88pin to DIP adapter for like $20
(or make their own), and plug it into a breadboard. I could only find a QFN-72
to DIP adapter with 5 minutes of searching.

[http://www.proto-
advantage.com/store/product_info.php?produc...](http://www.proto-
advantage.com/store/product_info.php?products_id=3100034)

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grogers
This is interesting - each node is tiny and can barely do much (mainly RAM
constraints). But because they are tiny, you can pack tons of them on a
chip/board and coordinate several nodes to do larger work items. Since all
actions are asynchronous (as opposed to clocked) you use very little power
when you aren't actively doing work, and the minimum amount of time required
to actually do the work.

I wonder why they settled on 18 bit words though?

~~~
Jach
From [http://www.yosefk.com/blog/my-history-with-forth-stack-
machi...](http://www.yosefk.com/blog/my-history-with-forth-stack-
machines.html) :

Look at the chips he’s making. 144-core, but the cores (nodes) are tiny - why
would you want them big, if you feel that you can do anything with almost no
resources? And they use 18-bit words. Presumably under the assumption that 18
bits is a good quantity, not too small, not too large. Then they write an
application note about imlpementing the MD5 hash function:

"MD5 presents a few problems for programming a Green Arrays device. For one
thing it depends on modulo 32 bit addition and rotation. Green Arrays chips
deal in 18 bit quantities. For another, MD5 is complicated enough that neither
the code nor the set of constants required to implement the algorithm will fit
into one or even two or three nodes of a Green Arrays computer."

Then they solve these problems by manually implementing 32b addition and
splitting the code across nodes. But if MD5 weren’t a standard, you could
implement your own hash function without going to all this trouble.

In his chip design tools, Chuck Moore naturally did not use the standard
equations:

"Chuck showed me the equations he was using for transistor models in OKAD and
compared them to the SPICE equations that required solving several
differential equations. He also showed how he scaled the values to simplify
the calculation. It is pretty obvious that he has sped up the inner loop a
hundred times by simplifying the calculation. He adds that his calculation is
not only faster but more accurate than the standard SPICE equation. He said,
'I originally chose mV for internal units. But using 6400 mV = 4096 units
replaces a divide with a shift and requires only 2 multiplies per transistor.
... Even the multiplies are optimized to only step through as many bits of
precision as needed.'"

------
_exec
_Export is controlled per US EAR ECCN 3A991A.3._

Could somebody clarify what this means? The only reference to "3A991A" I could
find is www.uptodateregs.com/_eccn/ECCN.asp?ECCN=3A991, however there is
nothing on that page about a .3 subsection.

~~~
adbge
a. “Microprocessor microcircuits ”, “microcomputer microcircuits”, and
microcontroller microcircuits having any of the following:

[...]

a.3 More than one data or instruction bus or serial communication port that
provides a direct external interconnection between parallel “microprocessor
microcircuits” with a transfer rate of 2.5 Mbyte/s.

 _www.access.gpo.gov/bis/ear/pdf/ccl3.pdf_

~~~
robin_reala
Exactly 2.5Mb/s?

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Groxx
Good God, that's cheap. _I_ can buy that evaluation board (and I very well may
some time). Best of luck to them with the sales, that's at a scale and price
that could open up a lot of options.

Compare and contrast to the E-ink evaluation board:
[http://store.nexternal.com/shared/StoreFront/products.asp?CS...](http://store.nexternal.com/shared/StoreFront/products.asp?CS=eink&CategoryID=3&Refresh=True)
6" = $3,000, and not too long ago they were over $8,000. Out of the reach of
many seeking to innovate without a company pushing them to do so.

------
doosra
How does this array do I/O? How does one bring in data (from disk/network)
into the chip? I couldn't find anything demonstrating high throughput I/O on
the eval board...

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jules
Can you do something useful on this chip? It seems to me that while the total
number of instructions looks good, what can actually be accomplished per
instruction is very bad. Not only do the instructions operate on very small
words, you need a ton of communication between the cores to do anything. E.g.
how fast would this thing realistically be for (integer -- it doesn't even
have floating point) matrix multiplication?

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steamer25
So if I'm following correctly...

1 ALU / 1.5 ns ≈ 67 MFLOPS * 144 units = 96 GFLOPS

Obviously, a significant percentage of work in the real world would probably
go to distributing instructions amongst the units.

Anyway for comparison, according to the thread here:
<http://forum.beyond3d.com/showthread.php?t=51677>

...an Intel Core 2 Quad QX6850 runs @ 48 GFLOPS.

~~~
ramchip
Isn't a FLOP a "Floating Point Operation"? If the chip has no FP unit, it does
0 FLOPS.

~~~
steamer25
I see... I suppose the efficiency of the presumed software-based floating
point library can be factored along with the parallelization then.

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metamemetics
"144 computers"=="144 core parallel cpu" ? I'm guessing this is not x86 and
targeted at academic researchers looking to build custom, massively parallel,
computational clusters on the cheap [ computational neuroscience? ]. If anyone
could volunteer additional context or applications for this please do so, I'm
not as familiar with hardware as I'd like to be.

~~~
thesz
It has 64 words of RAM and 64 words of ROM. It has 18-bit word for ALU
operations and commands.

I think it has more than one MISC command in a word, I think count is about 3
(six-bit commands).

I cannot wrap my head around how to program that... not a beast, more like a
field of tiny windmills. One of the designers of preceding chips once wrote
about using it as a systolic engine, but the area of systolic algorithms is
quite narrow, AFAIK.

I cannot find any C/Fortran compiler or compiler for any other high-level
language.

My overall impression is that this looks like all bad ideas from Cell BE were
ported to Forth language.

MISC:
[http://en.wikipedia.org/wiki/Minimal_instruction_set_compute...](http://en.wikipedia.org/wiki/Minimal_instruction_set_computer)
John Sokol on early GreenArray alike designs:
[http://hardware.slashdot.org/comments.pl?sid=274687&cid=...](http://hardware.slashdot.org/comments.pl?sid=274687&cid=20297751)

~~~
metamemetics
My initial thought was: high density, asynchronous cores -> brain modeling.
You treat each asynchronous core as a neuron.

Reading up on Charles Moore this may indeed be the intended case:
<http://www.pcai.com/web/ai_info/pcai_forth.html>

> _Charles Moore created Forth in the 1960s and 1970s to give computers real-
> time control over astronomical equipment. A number of Forth's features (such
> as its interactive style) make it a useful language for AI programming, and
> devoted adherents have developed Forth-based expert systems and neural
> networks._

Still, 100 billion neurons in brain / 144 cores * $20 per chip = ~$13 billion
. Also I would guess most modern researchers in this area don't know Forth and
are doing high-level programming and virtualizing neurons rather than taking a
low-level hardware approach.

~~~
thesz
Forth was used in AI in a pretty non-linear way.

I have a book where authors developed Lisp on Forth and then proceed
developing Prolog on newly created Lisp. Then they demonstrated how to use
that Prolog in the development of rule-based expert system.

There was a saying that Forth amplify programmers' ability to develop programs
and to make mistakes. If you a need an AI tool, but do not need your mistakes
to be amplified, stay away from Forth. I think that apply to other areas of
domain-specific development as well.

While I adore Forth, I cannot recommend it to anyone. Especially to simulate
brain - what if you introduce an error, Forth amplifies it and we'll get a
hidden psychopath? ;)

~~~
silentbicycle
What book is it? You can't just mention a book that has Forth, Lisp, AND
Prolog and not give the title. :)

PAIP and a couple others have Lisp and Prolog, LOL has Lisp and Forth, HOPL 2
has all three (but separately), but it doesn't sound like any of those.

~~~
TY
I think he probably spoke about "Designing and Programming Personal Expert
Systems" by Carl Townsend that dates back to 1986.

From <http://www.faqs.org/faqs/computer-lang/forth-faq/part5/>

    
    
      Contains LISP and Prolog emulations in Forth, 
      including a unification   algorithm.  It also has some
      minimum distance classifier code. 
      The application is fault diagnosis in locomotives.

~~~
silentbicycle
Salute!

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Keyframe
Great to hear stuff like this, and I just asked this several days ago:
<http://news.ycombinator.com/item?id=1797124> but it went nowhere.

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mbeihoffer
At first I thought it said Chuck Norris and I was like BAHAA!

