
16-bit RISC-V processor made with carbon nanotubes - Tomte
https://arstechnica.com/science/2019/08/16-bit-risc-v-processor-made-with-carbon-nanutubes/
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messe
For those of us wondering what they meant by 16-bit RISC-V (as there isn't a
16-bit RISC-V ISA), it's just 32-bit RISC-V instructions operating on 16-bit
data and addresses.

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squarefoot
Sort of what the MC68008 was ages ago: 32 bit internal architecture but
reduced external data and address buses so the chip could be used to build
simpler/cheaper systems.

~~~
vardump
MC68008 was internally 16-bit. 16-bit "add.w d0, d1" takes 4 clock cycles and
32-bit "add.l d0, d1" takes 8.

~~~
monocasa
32-bit internal architecture here meaning 32-bit registers, and a greater than
16-bit address space (yeah it's not full 32-bit, but neither read the full
68000).

~~~
vardump
68000 was a 32-bit ISA, but with 16-bit internals, mainly meaning ALU. 32-bit
register file, flat 32-bit address registers (pointers). Moving data with
move.l and move.w between registers was both 4 clock cycles. I wrote a ton of
assembler on 68k back in the days and absolutely loved the large orthogonal
register set and useful addressing modes. Going to x86 was rather painful
after that. :-)

Some ways 32-bit, but 16-bit level performance.

I think in the end you can call it either way.

~~~
monocasa
But like, a z80 had a 4 bit ALU and internal datapath, but I don't see anyone
calling it a 4 bit architecture.

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vardump
Now that you mention, z80 always felt so 4-bittish... ;-)

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monocasa
Haha, ok, fair enough. : )

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noneeeed
Can someone ELI5 what the advantage a CNT based chip would be? Is it more
energy efficient, or can they operate at a higher frequency?

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gnode
We want to make transistors ever smaller to increase their energy efficiency
and fit more of them on a chip. Scaling down transistors made of materials
like silicon hits limits, as the distances become so small that electrons can
leak through the materials.

In a field effect transistor (FET), you have a channel and a gate. The channel
is a bit like a bridge which can be raised and lowered as ships travel
underneath. Ideally, electrons shouldn't be able to flow between the channel
and the gate (falling off the bridge), and depending on the voltage at the
gate (position of the ship), the channel should range in resistance between
zero (completely open; transistor is on) and infinity (completely closed;
transistor is off).

In a CNTFET, the channel is replaced with a carbon nanotube. The nanotube
channel is very good at keeping the current carriers (electrons) inside, and
so leakage is small. Additionally, nanotubes are very good at carrying
current. To use the bridge analogy, the CNTFET has a bridge that is very wide,
and so allows lots of people across, and has high walls such that the people
don't fall in the water or onto the ship.

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f00zz
Not quite the rod logic [0] processor I expected from the headline, but pretty
cool!

[0] [https://youtu.be/ORjyXcLDd9M?t=1536](https://youtu.be/ORjyXcLDd9M?t=1536)

~~~
lachlan-sneff
Rod logic is super cool! Wish more people were looking into it!

~~~
tasty_freeze
The problem is you need a gain of greater than 1 for a sequence of elements
otherwise the noise will eventually swamp the signal and lead to an ambiguous
or incorrect result.

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namibj
Can't you use some distributed amplifier principles to increase gain?

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Symmetry
A creative way of getting around the low transistor yield that nanotubes are
currently stuck with.

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Taniwha
This is a stunt - but it's a pretty cool stunt

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rwmj
A link to the paper would be nice. Unfortunately nature.com is paywalled. Does
anyone know what open source design they modified? I'm guessing PicoRV32.

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3SunSyzygy
sci-hub.se/10.1038/s41586-019-1493-8

~~~
rwmj
Nice! This should really be the article link in my opinion.

Anyway I was wrong about the design. It looks like they implemented their own
very simple finite state machine, but did use Clifford Wolfe's riscv-formal to
specify it: [https://github.com/SymbioticEDA/riscv-
formal](https://github.com/SymbioticEDA/riscv-formal)

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hcarvalhoalves
A processor made out of tiny resistors?

~~~
Koshkin
Don't CNTs have some semiconductor properties?

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hcarvalhoalves
How does that work? Wouldn't it be a low-efficiency one due to the higher
material resistance?

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garmaine
Your info on CNTs are a few years out of date. There are some really
remarkable experimental results that go beyond what the theory predicts.

~~~
hcarvalhoalves
Thanks. I read up on it and found:

    
    
        The electrical resistance problem
    
        In October of last year an IBM-led team of researchers reported a solution to the electrical resistance problem. In a typical configuration metal contacts are attached to the top or the sides of the CNT. The team from IBM placed the contacts at the ends of the nanotube. They also joined the nanotube to the metallic components of the integrated circuit with a molybdenum-based carbide.
    
        Intel current top-of-the-line chips operate at a 14 nm scale and Intel plans to introduce 10 nm chips in 2017. The team from IBM built a CNT transistor that showed no increase in electrical resistance with contact lengths from 300 nm to less than 10 nm.
    

[https://www.forbes.com/sites/kevinmurnane/2016/09/08/carbon-...](https://www.forbes.com/sites/kevinmurnane/2016/09/08/carbon-
nanotubes-are-getting-closer-to-making-our-electronic-devices-
obsolete/#27ae198533d6)

~~~
Fnoord
Please quote properly, like this:

> The electrical resistance problem

> In October of last year an IBM-led team of researchers reported a solution
> to the electrical resistance problem. In a typical configuration metal
> contacts are attached to the top or the sides of the CNT. The team from IBM
> placed the contacts at the ends of the nanotube. They also joined the
> nanotube to the metallic components of the integrated circuit with a
> molybdenum-based carbide.

> Intel current top-of-the-line chips operate at a 14 nm scale and Intel plans
> to introduce 10 nm chips in 2017. The team from IBM built a CNT transistor
> that showed no increase in electrical resistance with contact lengths from
> 300 nm to less than 10 nm.

Your quote is unreadable on mobile, and annoying on desktop because of
scrolling.

