

Micron Automata Processor – A Brief Introduction - crb002
http://files.shareholder.com/downloads/ABEA-45YXOQ/2856943415x0x714620/f72a92f0-5ace-4a6a-a124-f296c24f4573/

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greglindahl
Good: a memory vendor finally getting serious about "processor in memory"
silicon.

Bad: Doesn't mention all the research that was done on these sorts of things
already. I mean, it makes a great story that you invented the whole thing from
scratch, but nothing screams "this is a slick marketing doc" more than
pretending that sort of thing. Or maybe they did ignore the literature and
made a bunch of mistakes as a result?

Edit: wow, the scientific paper does the same thing.

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crb002
What are some of the good papers?

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wsxcde
This
([http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumb...](http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=375174))
is one of the classic papers on PIMs.

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crb002
You should reach out to the IPDPS 2014 program committee and see this
reference gets added.

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majke
> "Deep packet inspection to monetize traffic"

Whoops.

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smoyer
Excuse me! ... I'm with the NSA and we really need to monetize some traffic.
Have you seen our budget?

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bamakhrama
The slides are misleading. "Memory Wall" refers to the fact that CPU speed has
been doubling every 24 months from 1960s till early 2000s (annual improvement
rate is 50%), while RAM memory speed doubles every 10 years (annual
improvement rate is 10%). This "memory wall" is there regardless of the
processor architecture that you use.

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wlesieutre
Math nitpick: It's a bit more complicated than that with exponential growth.
You can't divide up 100% over 10 years and say it was 10% each year, instead
you have to solve 2=1.1^x, and find that it doubles in 7.27 years.

If something grows 10% a year for 10 years, it actually ends up at 2.59x its
original size.

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greglindahl
Rule of 72: doubles in 10 years, annual %age is 72/10 = 7.2%. Close to the
right answer, easy to do in your head.

[http://en.wikipedia.org/wiki/Rule_of_72](http://en.wikipedia.org/wiki/Rule_of_72)

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wlesieutre
Huh, that's a handy approximation. I'd never heard of it before.

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pacaro
Also: pi-seconds is a nano-century.

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dTal
My favorite: 1337% of pi = 42 Beats Euler's identity any day.

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windexh8er
I think there's more here than most comments reflect - yes, this is being done
in many implementations today, but not nearly as efficiently. 4W for 1Gb of
DFA stream analysis? That's pretty crazy considering that can put full on
content inspection in a SOHO device that can end up in consumers networks. DFA
is the shift from file based scanning in network security and offers
parallelism efficiencies far beyond most of the UTM type platforms out there
today. There are only a few companies using stream based platforms (Palo Alto
Networks is one) and this is why the platform can do much more content
scanning in one pass vs the legacy devices.

But, this is killer for SOHO networking IMHO. Puts a ton of power into the
next wave of network security.

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erikj
Here's more:
[http://www.micron.com/~/media/Documents/Products/Other%20Doc...](http://www.micron.com/~/media/Documents/Products/Other%20Documents/automata_processing_technical_paper.pdf)

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ChuckMcM
Micron demonstrated early versions of this at Microprocessor Forum in 2004 or
2005. So it isn't exactly "new" but being able to actually get one is.

Pattern algorithms are pretty difficult to synthesize however, see the Conway
Glider search as an example. One of the challenges is that the set of
'instructions' and the solution possibilities are quite tightly interlinked. I
hope that I can get my hands on one at some point, some of the old texture
research from the Image Processing Institute would really fly on this thing.

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rasz_pl
Cant wait for Stephen Wolfram to claim it his own invention.

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ars
So, when can I get one and start mining bitcoins? Or since it's all about
memory, litecoins?

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eloff
With bitcoin we passed the FPGA mark a while ago, now it's all about custom
ASIC chips.

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dkural
The bioinformatics slides in that presentation make no sense. The image shown
doesn't map in any way to the bullet points.

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agumonkey
So this is like going from SMTP to IMAP ?

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smoyer
I didn't down-vote you, but if you were serious I think you should find a
profession outside of technology.

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agumonkey
I was almost serious, skimming through the diagram gave me the impression they
were moving computation capabilities close to the data ~backend.

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smoyer
Oh ... I completely missed that interpretation (maybe I'm too close to these
techniques). In any case, it's probably better to think of the system as a
giant state machine in which the data are states and the operations are
transitions. Its processing and memory co-mingled. You'll notice that it's got
a very wide data width (not a new idea) that speeds it up tremendously for
parallizeable tasks, but it's actually slowing down the "clock" since the
memory itself is still the slowest part.

(I also upvoted you ... you shouldn't get penalized for an honest question)

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dclara
Upvoted you. We need more insights like this than the document itself. The
concept of state machine, PIM (processing in memory) and parallelization is
the core, looks like Micro has some implementation now. That's why they call
it an Automata Processor (AP).

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wmf
The NSA processor—now available commercially!

