
SiFive Announces First RISC-V OoO CPU Core - vanburen
https://www.anandtech.com/show/15036/sifive-announces-first-riscv-ooo-cpu-core-the-u8series-processor-ip
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baybal2
> SiFive’s design goals for the U8-Series are quite straightforward: Compared
> to an Arm Cortex-A72, the U8-Series aims to be comparable in performance,
> while offering 1.5x better power efficiency at the same time as using half
> the area.

This is very a big statement. It's hard for me to think of how they do that,
when 8th gen ARM cores are said to be blowing just anything else on
size/performance ratio.

Where does SiFive get such an expertise in size optimisation?

~~~
audunw
The RISC-V ISA was made with some hindsight of what choices makes it easy to
optimize for OoO superscalar CPUs. If I remember correctly, that's one of the
reasons everyone jumped ship from OpenRISC to RISC-V (the big mistake in
OpenRISC being branch delay slots I believe)

It might also help starting from scratch.

I'm also not convinced it's entirely an apples-to-apples comparison. ARM might
support more complex instructions that their core don't, and the ARM core
might have features like TrustZone.

~~~
cesarb
> The RISC-V ISA was made with some hindsight of what choices makes it easy to
> optimize for OoO superscalar CPUs.

ARM's 64-bit architecture (AArch64) was also made with similar hindsight, so
that's probably not the whole reason.

~~~
monocasa
Most AArch64 cores still have to support AArch32 modes, and so aren't allowed
to take advantage of those optimizations.

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rbanffy
Considering binary compatibility is not a huge issue in the ARM space (at
least not as huge as it is in x86) it seems more like a design choice - it's
perfectly reasonable to have a CPU part that is aarch64 and knows nothing
about the 32-bit ARM ISA

~~~
monocasa
For the bigger ARM cores it is a huge issue. They're pretty much just used
inside phones and compatibility with everything in the app store is an
extremely important component of their requirements.

~~~
rbanffy
It depends.

Most software for Android is not native. My current phone can't run some
applications I bought on my Motorola Droid even though I doubt they have one
single line of native code. Those applications also don't show up on the
Google Store (at least on my phone), so nobody will get them anyway. I had one
x86 phone in the meantime, and I didn't see any compatibility issues.

As for the other player in town, Apple, they design everything, silicon, OS
and SDK and operate the only application store you can publish to, so, for
them, this is also something that can be easily controlled.

~~~
monocasa
Almost all games are native. Games are what generate the most
microtransactions, and are an extremely important component of the app store
from a revenue perspective.

And even Apple, who as you said has easily the most control of their
ecosystem, is rumored to go to only AArch64 on their next gen chips. They want
to move that way, but even they know the issues with moving that direction too
fast.

The x86 chip was relying on a process node advantage in order to have a more
intelligent memory subsystem that their competitors, to allow them to emulate
AArch32 perfoantly compared to their competitors. That process node advantage
is now gone and that option isn't available to x86 (and x86 disappeared from
the phone market as soon as the writing on the wall was apparent there).

And going back to original point, AArch32 is an albatross around the neck of
OoO core design. Features like making nearly every instruction conditional,
the restartable load/store multiple instructions, the instruction decoder is
almost as complex as x86 (there's almost 1200 instructions in AArch32),
instructions can straddle cache line and page boundaries, etc. heavily
complicate OoO designs.

Additionally, the one niche that wants powerful cores and isn't dependent on
backwards compatiblity (servers), has seen AArch64 only chips.

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jagger27
> A lot of the performance increases of the U8-series come thanks to the
> increased frequencies capabilities which are 1.4x higher this generation,
> with the core scaling up to 2.6GHz on 7nm.

Pretty cool that these chips are approaching performance parity so quickly.

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fulafel
"IP Core" in semi industry terminlogy means a bunch of RTL that is offered for
licensing, so this is not yet a working chip.

~~~
AWildC182
God I hate that term. It's not your secret sauce intellectual property, it's a
fucking library.

Possibly the biggest reason FPGA/ASIC tech has lagged so hard behind CPU/GPGPU
in terms of consumer use is because they have managed to use their hardware to
completely stifle all open source software (they even go to some lengths to
distance themselves from the term "software"). FPGA libraries are almost
always encrypted and have to be treated as a true black box when designing.
Doing things as mundane as interacting with a PCIe bus or simple signal
filtering are all locked away behind ludicrously overpriced "IP" packages that
are often vendor specific.

~~~
zozbot234
Interacting with a PCIe bus does not seem "mundane" to me. Analog electronics
is _hard_ , and, just as importantly, process-specific (and the details of any
one process are generally kept strictly confidential to the fab, with tightly-
binding NDAs). Now, when it comes to pure digital logic I agree, but that's
also where open hardware (with meaningful contributions by SiFive themselves)
has been most successful.

~~~
temac
The analog parts of PCIe interfaces are not programmable. The _artificially_
black boxes we are talking about are purely digital. They use fixed resources
but we are not asking for the design of those parts.

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bcheung
I wasn't sure what OoO stood for and since they never mentioned it in the
article I had to look it up. For anyone else who is asking the same question.

OoO = out of order execution

~~~
BookPage
It’s actually mentioned in a header after the third paragraph in the
article...

~~~
bcheung
Yeah, I saw that later on when I continued reading. I did a Find on the page
and was looking for "ooo" and didn't find anything like "order of order (ooo)"
because it's customary to define it when it is first used.

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mattnewport
A Raspberry Pi type SBC based on this would be neat, is that something we can
expect to see any time soon in light of this announcement or is that not an
application this is really aimed at?

~~~
brucehoult
That would be neat, and would come out somewhere similar to a Pi 4 (which are
pretty awesome).

Note that the Pi 4 has ARM processor cores, but ARM doesn't make either the
processor chip or the board. Broadcom design and make the BCM2711 SoC, and the
Raspberry Pi Foundation designed and manufactures the board.

No doubt SiFive would be very happy to work with someone who wanted to make
retail SoCs and/or SBCs using the U84, but as with ARM it's not really their
business model to do that themselves.

SiFive has made several low-volume chips and boards for potential core IP
customers to use for evaluation and development e.g. the $999 HiFive
Unleashed. ARM similarly offers a $10000 dev board for the A72.

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monocasa
Have we gotten confirmation yet on whether this is a BOOM core or not? It
certainly feels like it is

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yhvh
Is there a risc-v chip on the market which includes Bluetooth?

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arcticbull
Usually Bluetooth modules are add-on peripherals, unless I'm mistaken.

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aneutron
Exactly what I was thinking when I read the parent at first, but I'm assuming
the parent is asking about all-in-on SoC chips.

~~~
yhvh
Indeed I was

