
FPGA as DMA Controller Chip (2014) [pdf] - peter_d_sherman
http://www.iosrjournals.org/iosr-jvlsi/papers/vol4-issue2/Version-2/A04220108.pdf
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peter_d_sherman
Excerpt:

"Whenever data is to be transferred from an I/O to a memory, first the
processor read the data from the source address and then writes it to the
proper destination address. This leads to the wastage of CPU cycles just for
data transfer rather than processing. In many applications like image and
video processing, where data needs to be transferred frequently from I/O to
memory, if the processor is involved in the data transfer operation the
throughput and overall system performance may degrade.

That is why in those cases we use another controller; called DMA controller is
needed, which is responsible for transferring the data without the
intervention of CPU.

In this paper we have tried to implement a DMA controller core to transfer
real time data from I/O to DDR2 SDRAM in the Spartan 3A starter kit."

My Comments: Basically this paper is about using an FPGA (in this case a
Spartan 3A) as a _discrete DMA controller chip_.

(Side note: Something analogous to IOMMU might be desired for this too...)

