
AMD ships 16-core x86 3ghz CPU - ck2
http://www.maximumpc.com/article/news/amd_puts_servers_datacenters_piledriver_opteron_6300_series_processors
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alanctgardner2
It's really a shame how AMD's per-thread performance has been lagging Intel.
Maybe it's just their postition as an also-ran in a basically monopolized
market (desktop CPU manufacture), but I've always seen them as ahead of the
curve. They were optimizing per-cycle performance with Athlon while Intel was
still pushing higher clocks. They moved to 64-bit while Intel was still
pushing higher clocks. Now that Intel has turned their attention more fully to
optimizing their per-clock performance (and pulled ahead by a full generation
in fab technology), AMD hasn't really had a leg to stand on. Price and low-
power are OK, but ARM is already strong in those areas, and ARM servers are
becoming more likely by the year. AMD needs something more transformative than
massively-parallel chips and high frequencies.

I know it's a long shot, but could they try to go the way Intel did with
Itanium, and invent a new architecture/instruction set specifically designed
for server workloads? People have broadly expressed interest in ARM, but the
support isn't there right now. If AMD had a new RISC architecture with awesome
support and incentives for developers to target it, they might be able to
steal share from x64 and ARM chips.

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glhaynes
As someone who has little idea about chip design: is there that much room for
benefit purely from instruction set? i.e. if someone were to design the
Optimum Instruction Set [and perhaps it'd have to be optimum in only some
types of workloads at the expense of others?] and start building chips with
it, how much advantage would they really have over, say, x64?

Maybe a good question to go alongside this: if two teams of equal capability
with equal access to fabs, patents, etc were to both start completely fresh,
one team making the best x64 chip they could and one team making the best ARM
chip they could, how much difference would there be in speed and power-
consumption between the end products?

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MichaelSalib
I think a bigger issue though is high clock speeds forced on the industry for
marketing reasons. Current pipelines are way way to deep, but they can never
come down because that would decrease clock rates and lots of people have been
trained into believing that clock speeds indicate performance. If Intel & AMD
could convince the world to ignore clock rates, we'd get chips that had
slightly higher throughput with much lower power consumption and slightly
faster design cycles.

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MichaelSalib
Whoah. Downvoters, care to explain your logic here? Or do you think that 30+
stage pipeline in actually optimal for improving ILP?

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rz2k
I didn't downvote but:

>they can _never_ come down because that would decrease clock rates and lots
of people have been trained into believing that clock speeds indicate
performance

is a bold statement that is not likely to be true. Casual metrics of
performance change, and I doubt there are many people confused as to whether
they choose a 4GHz Pentium 4 over a lower clocked Core 2, much less something
like a Xeon E5.

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wmf
Perhaps people are not confused simply because those older processors are no
longer sold. AMD certainly felt the need to fudge their frequency back in the
K7 days (although megahurtz marketing may be specific to the desktop market).

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swalsh
Can anyone with experience explain why the frequency of processors has
basically stalled since hitting 3.x Ghz? I assume there is some kind of
physical barrier, but i'm not sure what it is.

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Jtsummers
Temperatures mainly. CPUs were approaching 4GHz a decade ago, but the power
consumption and temperature output made higher speeds (and even those speeds)
impractical. Multicore at those speeds would've (again) been power-wise
impractical, so it made more sense to drop the speeds and have 2-4 cores until
process improvements allowed clock speeds and core counts to both be higher.

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sliverstorm
_Multicore at those speeds..._

In addition to power concerns of many fast cores on one chip, server chips
(the multicore champions) tend to be larger dies, and place higher value on
MTBF. I believe both of these factors work against super high frequency server
offerings.

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greedo
IBM's Power6 and 7 PowerPC cpus have easily exceeded 4GHz and even hit 5GHz
for a few years. These are normally used in their AIX platforms.

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sliverstorm
Right, and that makes sense. Larger dies are primarily a cost issue; they
reduce yield, which increases cost per functional die. More development effort
spent on MTBF is a resource issue; work spent improving MTBF is work not spent
improving operating frequency, but with enough resources (money) it doesn't
have to be a problem.

I could be wrong on this, but I believe IBM's AIX line is not cheap, if you
see where I'm going with this.

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greedo
You're definitely going in the right direction; Power5/6/7 hardware is very
pricey. I'm amazed that in this day and age, AIX still has a place in many
companies, and slightly perturbed that I have to maintain it. I'd much rather
have the applications running under RHEL.

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ck2
A decade ago I figured we be at 10ghz by now, didn't count on more cores
instead of faster.

Of course you cannot compare 1ghz in 2003 to 1ghz in 2013, way more efficient
per clock cycle with the right code.

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dillona
Unfortunately with clock speeds, we wind up bumping up against fundamental
laws of physics.

At 10Ghz, something moving at the speed of light can only go around 3
centimeters per clock cycle. Take out gate delays, and you wind up with
something that just isn't practical.

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ck2
You're thinking 2-dimensionally ;-)

Our future CPUs should be tiny cubes, not flat chips.

Distance to each point in 3 dimensions is shorter.

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miahi
You cannot efficiently cool a cubical CPU.

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dsr_
Take eight chips. Stack them, insert spacers and bridges from top to bottom,
and connect them via BGA or pins or what-have-you on the very top and very
bottom chips.

Now turn them sideways, so they rest on the edges. Put the stack in a small
ceramic container with copper bottom and top. Fill with a high efficiency
thermal transfer fluid, and make sure the convection currents flow properly.

There you go, small matter of engineering.

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miahi
This defeats the "shorter distance in a cube" issue.

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swax
I want each process on my computer to have its own core.

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cpeterso
s/process/thread/

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qdog
Maybe he doesn't use threading.

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cpeterso
I assume his processes have at least one thread.

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zmmmmm
This is a nice bump on what you can do currently with a standard monolithic
server, which I think was 4x12 => 48 cores in the last generation. 64 high
performance cores is pretty useful for a lot of modest sized big data
computational tasks that otherwise would require you to step up to an entirely
different (distributed) architecture.

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lorenzfx
I'm wondering where is AMD's counterpart to Intel's Xeon E3-12XX? ECC RAM, AES
NI and a low price point and hopefully not too high idle power usage should
make an attractive CPU.

On a side note: does anyone know what happened to the "Zurich" 32XX Opterons?

