
All AMD ThreadRipper CPU's will have 64 PCIe Lanes - tutanchamun
http://www.anandtech.com/show/11482/amd-cpu-updates-threadripper-64-pcie-lanes-epyc-june-20th
======
xbmcuser
I was of the opinion that Intel will only face real competition when arm
reaches parity with desktop class cpu. Nice to see AMD rise back up again.
Hope Intel is not able to strong arm the oems like last time when AMD had
design wins but Intel using anti competitive practice stalled its growth till
it was able to catch-up and later go ahead.

~~~
nicktelford
I doubt we'll be seeing desktop ARM systems any time soon, especially high end
workstation or enthusiast systems.

The problem is that the ARM64 architecture is completely different from
x86-64, which almost every desktop application is compiled for _exclusively_.

Remember when Microsoft launched an ARM Surface? It had a special version of
Windows, and almost nothing would run on it, as very few applications are
compiled for Windows on ARM.

~~~
DaiPlusPlus
> It had a special version of Windows, and almost nothing would run on it, as
> very few applications are compiled for Windows on ARM.

That wasn't the reason. It was because Windows RT was artificially locked-down
to only allow sandboxed "apps" from the Windows App Store to run. There's not
much of a use-case for only glorified web-service clients on a machine with a
desktop UI regardless of the ISA they're compiled for.

Had MS allowed arbitrary ARM code to run on the Surface RT, free of sandbox
restrictions, I think the platform would still be alive today - probably as a
successor to Windows CE for kiosk applications.

(Though there is now finally a non-locked-down version of Windows 10 for
ARM... so let's see...)

~~~
TazeTSchnitzel
Yeah, it required the Windows Store, and additionally at that time it could
only have WinRT (unrelated to Windows RT; basically the old name for UWP)
apps. These days you can put Win32 apps on the store. If Microsoft allowed
Win32 ARM apps on the store, maybe Windows RT would have succeeded. Maybe.
Software publishers probably wouldn't have wanted to lose that control.

------
old-gregg
Before you get excited about unleashing the power of 16 cores on your
desktop... I have recently upgraded from the 4-core to 6-core i7 with roughly
the same frequency/turbo and noticed that compile times have actually
increased.

Disappointing, I thought, especially because in addition to extra two cores I
now sport a quad-channel DDR RAM. Well, turns out that compiling my Go
projects does not generate enough "hot" threads, and the Linux scheduler keeps
moving them around between 6 cores, letting the cores to "cool down" and drop
to 1.2Ghz idle frequency. Meanwhile the 4-core box is happily spinning at
3.4-3.8Ghz during the compile cycle.

The only way to make the 6-core box to perform was to enable "performance"
policy for intel_pstate which leads to the CPU running at its full speed even
at idle (not great). Once I did that I saw the performance increase by 50%.

Here are the compile times of the same project on both machines with different
CPU frequency scaling policies:

    
    
      governor/cpu       4-core 3.4Gz      6-core 3.3Ghz
      ------------       -------------     --------------
      standard           13 sec            15 sec
      performance        11 sec            9 sec
    

As far as I know, AMD does not have an equivalent of intel_pstate in Linux
kernel and relies on legacy ACPI governor which isn't as sophisticated as
Intel's (where the CPU is more self-regulating) and I wonder what kind of
effects to expect in regards to performance / power consumption if I go for
Ryzen.

~~~
Xeoncross
Solution: Keep all CPU's active.

go build main.go &

go build main.go &

go build main.go &

go build main.go &

go build main.go &

go build main.go &

/s

~~~
hinkley
I get that you're being funny, but there's a valid question in there.

Does go not support parallel build jobs? If so then he should be setting the
count to six instead.

~~~
old-gregg
The bigger question, at least for me, is either high-core machines improve
your desktop experience if you're mostly running low-threaded workloads, for
example a web browser.

One humble piece of evidence I gathered says that no, more cores make your
low-threaded applications run slower because the Linux scheduler keeps placing
them onto "cold" cores running on idle frequency, and once they "spin up" the
thread gets moved to another cold core.

------
nicktelford
The huge number of PCIe lanes is pretty exciting to me. For consumers, the
limiting factor in PCs these days tends to be I/O. With this, you could have
_4 PCIe M2 SSDs_ (that's a bit under 16Gbps bandwidth, assuming RAID0), and
still have 44 lanes (the number in the top-end Intel CPU) to spare for GPUs
and other peripherals.

~~~
vbezhenar
I don't fully understand. So 1 SSD need 1 lane. How many lanes need something
like NVisia 1080Ti? What use of the remaining lanes? If I want to build
something like 1 CPU/1 GPU/1 SSD configuration without additional peripherals,
62 lanes will be effectively wasted?

~~~
floatboth
A GPU _can_ use 16x 3.0 lanes, theoretically. In practice 8 lanes is enough,
people have measured performance between 16x and 8x, it's almost the same.

SSDs use 4x, if you do buy an NVMe drive that is. (In my country, these things
are TWICE as expensive as SATA SSDs lol)

~~~
shaklee3
Maybe for games, but for cuda this is certainly not the case. Double the lanes
is double the host to device bandwidth.

~~~
floatboth
"CUDA" is not a particular application. You could very well be doing something
with CUDA that does extremely little data transfer to/from the host, but a lot
of computation on the GPU. Like mining :D

Also, host to device can be bottlenecked by memory speed on either side.

~~~
shaklee3
CUDA meaning GPGPU. All I was pointing out is that there is definitely a
bandwidth doubling going from 8 to 16 lanes. It's used extremely often by
people using the cards for compute. Mining may not have that issue, but deep
learning and other applications do.

------
grabcocque
We all benefit when AMD is a player.

And this player is fighting HARD right now. Me gusta.

~~~
johansch
I've long been thinking that it would make sense for e.g. US+EU to fund AMD
just in order to get some actual competition going.

~~~
Quequau
Some years ago I read a moderately well fleshed out proposal to create a
European semiconductor consortium as a sort of an Airbus for CPUs. My
recollection is that, while it was somewhat flawed, it was an idea with
significant merit.

~~~
redtuesday
They should do the same for software companies that produce software for the
governments, with the requirement to open source the software.

~~~
zanny
This is coming from an area where Microsoft has a vicegrip on all government
software to the tune of 99% of the market, and then runs smear campaigns and
tries to bribe politicians in that last 1% to adopt them.

Most politicians are technologically illiterate and when the people they know
are those with the most money to get closest its going to be big corporate
interests that get their ear.

------
masklinn
Salient point:

> all 64 lanes being _enabled for all ThreadRipper_ SKUs. This will be broken
> up into 60+4: _60 lanes directly from the CPU for feeding PCIe and M.2
> slots_ , and then another 4 lanes going to the chipset

And

> the 16 core processor will for most purposes be half of an Epyc processor

Epyc (formerly Naples) is the server-grade arch with 8 memory channels, 32
cores and 128 PCIe lanes per socket.

~~~
TazeTSchnitzel
I wonder if it's the same silicon as Epyc, just ThreadRipper gets the worse
bins.

Or maybe there's one less chip in the package?

~~~
bryanlarsen
ThreadRipper has 2 CPUs in its MCM, and Epyc has 4.

~~~
TazeTSchnitzel
Ah, so the high-end ThreadRipper would contain the same chips as a high-end
Epyc, just twice as many, and likewise for the lower-end variants, I guess?
That makes sense.

~~~
masklinn
> just twice as many

Half. Epyc gets 4 MCM[0], ThreadRipper gets 2 (with each MCM containing 8
Ryzen cores)

[0] [https://en.wikipedia.org/wiki/Multi-
chip_module](https://en.wikipedia.org/wiki/Multi-chip_module)

~~~
TazeTSchnitzel
Uh, right. Got it the wrong way round.

------
znpy
Competition is supposed to bring prices down, yet Intel released i9 processor
for an insane prize (nearly 2000$).

If AMD manages to ship similar performance (not necessarily higher) at a lower
price... Sooner or later Intel will have to slash its prices.

Looking forward to such times.

~~~
webaholic
But it did. Intel reduced their 8 core processor prices from 1000$ to 600$.
See their new lineup: [http://imgur.com/a/LSpau](http://imgur.com/a/LSpau)

~~~
vonklaus
Basically Intel has been greedy / hasn't had the competition. The _result_ of
Moore's law is still quite possible it seems. Even with a slowdown in chip
density; computing prices can fall on similar historical curves now that AMD
is competing.

------
doe88
Relevant link [1] for background informations on expected shortcomings of the
recently announced concurrent Intel CPUs.

[1] [http://semiaccurate.com/2017/05/30/intel-announces-x-
series-...](http://semiaccurate.com/2017/05/30/intel-announces-x-series-
without-details/)

------
slizard
Threadripper & EPYC are a truly epic move to jump into the dense GPU
workstation and server market! With a Threadripper you get four x16 GPUs
without PLX or three + a couple of SSDs.

Time for @nvidia to switch the DGX boxes to @AMD CPUs? :)

------
wiredfool
64 lanes would be good for something like 4-6 GPUs @ 8 lanes per, and some
high speed storage/networking?

Anxiously awaiting Intel's "I am not left handed either" response.

~~~
redtuesday
Yeah, depending on the configuration it would maybe even be enough for 7 GPU's
with 8x PCIe 3.0 (60 of the 64 are feeding PCIe and M.2 slots, 4 go to the
chipset). Seems like it will be a nice CPU to use for machine learning.

Other sites also report that it will support 2 TByte of RAM like the single
socket Naples/Epyc, but LRDIMM and official/validated ECC support was not
mentioned in the stream.

~~~
hishnash
Oh, yer will be very nice for Machine learning I can see a lot of people
getting this.

Also even though they did not mention it for lower end servers. Servers
currently using a single Xeon.

> official/validated ECC support

Given all the other Zen cpus have this i think it will, after all it is just 2
ryzen CPUs with a load of PCI!

------
crb
Any word from AMD on support for Thunderbolt 3, now Intel are making it
available royalty-free?

[https://newsroom.intel.com/editorials/envision-world-
thunder...](https://newsroom.intel.com/editorials/envision-world-
thunderbolt-3-everywhere/)

~~~
masklinn
They've only announced it would be royalty-free circa 2018:

> next year Intel plans to make the Thunderbolt protocol specification
> available to the industry under a nonexclusive, royalty-free license.

no point in AMD saying anything at this point.

------
altcognito
Do the extra PCIe lanes help the GPUs for deep learning applications, or is
the data typically pretty localized on the GPU board?

~~~
hishnash
Yes, massivly deep learning is all about learning from data. With the work I
have done I have seen that currently unless you buy a 2xeon server you can't
get enough data through to justify haveing 4 GPUs on one machine. So commonly
its cheaper to break out to multiple machines, but this then has an impact on
how you code your learning since communication between the GPUs then is much
slower.

Think of training a NN to learn cats expressions and such Meme txt to go along
with pictures of cats. So 1) you collect as many cat memes as you can
(easy,... 40k memes of cats later) you start training... you need to normalise
all the images you need to extract the meme txt and normalise this and you
need to feed this through your tenso flow (or other system) to train it. This
means pusshing your small data sample of 40k through the GPU and back out and
possibly doing this a lot, there is no way they will all fit on your GPU and
even if they do you need to get them on there in the firrst place.

------
geiseric
Does any remember the DEC Alpha? Windows NT 4.0 was ported to it. The Alpha
was a 64-bit RISC processor. (Reduced Instruction Set Computer) An ARM is just
an Advanced RISC Machine. RISC architecture has an instruction execution
advantage over CISC (Complex Instruction Set Computer) that is what Intel is
famous for. Although they did have a i860 and i960 RISC which many of them
were for embedded military systems.

Other RISC systems were from Silicon Graphics, with their MIPS processor were
used for 3D graphic processing. RISC has shown that it has its place in the
computing world time and time again.

My personal appeal is their low power requirements and compact designs.
Obviously cell phone manufactures like it too for the same reasons.

~~~
Corrado
Yes, I actually managed a SQLServer computer running on a DEC Alpha machine. I
don't remember anything specifically wonderful about the DEC other than it was
one of the biggest servers I had seen at the time and it had a large ducted
fan in the front for cooling. Neato!

------
gigatexal
If the clock speeds are decent (and the price is reasonable) this will be my
next workstation CPU. Can't wait.

------
bkjelden
I didn't see pricing info in the article. Has that been announced anywhere?

~~~
redtuesday
No, there was also no word on official/validated ECC support, only that
Threadripper will launch this summer. But people hope for something between
999$ (since it is two Ryzen R7) and 1499$ for the 16 core CPU. 999$ would be
awesome, but 1499$ sounds much more realistic, maybe even more, since it has a
much larger socket, high end platform bonus etc.

~~~
hishnash
> there was also no word on official/validated ECC support

I think given all the other Zen CPUs support it i think that is a given.

> 999$ (since it is two Ryzen R7) and 1499$

I think it will be more around the 999$ but the motherboard will be quite
expensive, it is after all basically a duel CPU main board. Don't expect to
pick up a board for under 500$

~~~
redtuesday
> I think given all the other Zen CPUs support it i think that is a given.

Yes, Ryzen can use ECC if the motherboard maker supports it, but ECC support
is not validated. [0]

[0]
[https://www.reddit.com/r/Amd/comments/5x4hxu/we_are_amd_crea...](https://www.reddit.com/r/Amd/comments/5x4hxu/we_are_amd_creators_of_athlon_radeon_and_other/def6vs2/)

~~~
hishnash
I think that in the end this will be down the mainboard makers to get
validation so possibly will not be validated on non-server style boards. But
if there is demand given epic is basicly the same thing just bigger im sure
they will do it.

------
Nereus77
I dare say, that might be enough lanes....

