
PYNQ – Python Productivity for Zynq - wyldfire
http://www.pynq.io/
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Vijayenthiran
Can I used the Matlab system generator with this board? I love the idea of
hardware overlays, but if I want to get deep into the VHDL design, will it
support? In my college we used to use system generator tool for generating the
vhdl codes.

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trapperkeeper79
I've been delving into VLSI but realize it is quite a complex topic. Can
anyone familiar with this provide a TLDR? Is the idea here that instead of
verilog, etc. one can use python to code a PLD/FPGA?

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kmod
Here's the relevant bit from the overview:

    
    
      Programmable logic circuits are presented as hardware libraries called overlays. These overlays are analogous to software libraries. A software engineer can select the overlay that best matches their application. The overlay can be accessed through an application programming interface (API). Creating a new overlay still requires engineers with expertise in designing programmable logic circuits.
    

In other words, you're not doing direct programming of the FPGA with these new
apis. Instead it looks like they are making it easier to select and use
existing overlays (aka existing hardware designs) by wrapping it up in some
nice Python interfaces. So as more overlays are released (right now it looks
like there is only the "base" overlay) it should be easy to switch between
them as you want to accelerate different sorts of problems.

You might say "why doesn't this exist already", but the whole ecosystem is
currently quite hard to use (think GPU programming but from 5 or 10 years ago)
so putting some nice interfaces on it could be a big step. Will be interesting
to watch.

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bisrig
To add to this - a lot (maybe all?) of the functionality that is described by
the concept of "overlays" maps to the design and implementation of the
programmable logic in a coprocessor system. To use Xilinx terms, this would be
the block diagram that describes the periphery that connects to either a soft-
or dedicated-core processor. The block diagram will control the usage of
programmable logic cores and provide hooks for the BSP generator and SDK to
wrap these in ways useful for software development - memory maps & base
addresses, associated drivers, etc.

The big value add that I see here is that the management of these overlays has
traditionally been painful, especially when trying to swap overlays at runtime
- this is always sold as one of the big benefits of SoC processor+FPGA, that
you can do things like dynamic hardware accelerators based on what software is
currently running, but more than some assembly has always been required. This
seems like a nice step in the direction of having reasonable mechanisms to
reconfigure based on application.

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ZenoArrow
I could be wrong, but I'd imagine the overlay functionality is fairly similar
to 'header' files in other programming libraries, in that they're a list of
instructions available to program with, that point to a precompiled library
(in this case, hardware-accelerated libraries).

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gravypod
Is the academic price only for schools or does it apply to students as well?

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revelation
Digilent academic pricing is for students, but you'll have to write some words
about your project and it's a manual verification process. Worked fine for me,
though.

