
IBM opens up Power chips, ARM-style, to take on Chipzilla - mmc
http://www.theregister.co.uk/2013/08/06/ibm_opens_up_power_chips_armstyle_to_take_on_chipzilla/
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gvb
I'm not quite sure where the news is here. IBM has been licensing the
architecture and cores for years (2007 is mentioned[1]).

All I see in the actual announcement[2] is marketing hype (not news) about
software that already exists ("open firmware" == U-Boot, "open software" ==
linux) and hardware that has been licensable for years.

[1]
[http://en.wikipedia.or/wiki/Power_Architecture#Licensing](http://en.wikipedia.or/wiki/Power_Architecture#Licensing)

[2]
[http://www-03.ibm.com/press/us/en/pressrelease/41684.wss](http://www-03.ibm.com/press/us/en/pressrelease/41684.wss)

~~~
duaneb
ARM is an "open" architecture—it's fairly easy to roll your own if you have an
FPGA and patience to read through arch specifications for a couple months. I
would be highly surprised if you could get equivalent documentation for POWER
without a significant bit of cash. Not that I blame them, even open standards
can cost a couple hundred.

I don't think this would change anything, though, there's not enough gain to
justify an architecture switch for either hardware or software people. And
that's a damn shame. I cut my teeth on PowerPC and I couldn't imagine a better
way, it's a beautiful architecture. Altivec STILL makes intel's vector
processing look like a toy.

~~~
wmf
[https://www.power.org/documentation/power-isa-
version-2-07/](https://www.power.org/documentation/power-isa-version-2-07/)

BTW, if you want to roll your own ARM you have to negotiate for an
architectural license.

~~~
duaneb
> BTW, if you want to roll your own ARM you have to negotiate for an
> architectural license.

I would hope not for a personal FPGA... that's hilariously unenforcable.

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tommi
"With its embedded Power chip business under assault from makers of ARM and
x86 processors"

I didn't know Power chip business still existed.

~~~
gngeal
Of course it still exists. They're doing this now because they don't want to
be steamrolled by the raging success that is the OpenSPARC project.

~~~
venomsnake
It is the execution that counts. The world could use a third mass
architecture. Especially one that is not too tightly IP locked. The whole web
0.1, 1.0,2.0 came from the fact that PC clones were everywhere.

~~~
justincormack
Its not clear if it is third or fourth now. MIPS may be third after ARM.

~~~
Symmetry
It _really_ depends on whether your counting number of chips or dollars in
sales. POWER chips sell at a premium inside high end enterprise systems, while
MIPS is embedded in lots of places like handheld consoles and routers for more
chips sold but for less money.

~~~
vidarh
The high end POWER chips from IBM makes up a miniscule fraction of the overall
Power/PPC market in terms of units. PPC sells in comparable unit numbers to
MIPS, but mostly from architecture licensees like Freescale.

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astrodust
I would love to see a Rasperry Pi type device with a PPC chip on it, a 603e
equivalent for example, or even better, a 7400 series "G4" chip.

~~~
AnthonyMouse
FWIW: [http://www.ebay.com/sch/Desktops-
AllInOnes-/171957/i.html?_s...](http://www.ebay.com/sch/Desktops-
AllInOnes-/171957/i.html?_sop=15&_from=R40&_nkw=g4+mini&LH_BIN=1)

Costs more than the Raspberry Pi though.

~~~
jevinskie
Watch out for used G5s that have leaked their coolant.

~~~
AnthonyMouse
Just avoid the G5s whatsoever. They're enormous, hot, and very poor value for
money because they're the fastest Macs that can run Classic, which means they
continue to get bid up by people with legacy software. For the same money you
can get a Core 2 Duo which will be superior in every way provided you don't
need to run MacOS on it.

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chokolad
Strong feeling of deja vu

[http://en.wikipedia.org/wiki/Common_Hardware_Reference_Platf...](http://en.wikipedia.org/wiki/Common_Hardware_Reference_Platform)

~~~
astrodust
There was even a version of Windows NT 4.0 for that. It was great. Then
Motorola decided they had no clue what they were doing with computers, IBM
gave up and shut the whole thing down.

~~~
bluedino
All of the RISC chips were dying anyway. Intel was starting to build steam
with the Pentium Pro and Pentium II, Wintel servers were getting cheaper and
more common, Windows was becoming 'good enough' and Linux started to push the
expensive traditional Linuxes off the table.

~~~
Symmetry
That's really just the standard Innovator's Dilemma effect where low-cost,
high-volume products often tend to eat their way up the market. Now that the
semi-RISC ARM processor is attacking Intel from the low end it's having the
same sort of success as x86 did over MIPS, etc.

~~~
scholia
Cheap Mips and other RISC chips were supposed to replace all the clunky old
x86 style processors, so it's one case where the Innovator's Dilemma effect
turned out to be wrong.

~~~
astrodust
Neither RISC nor CISC won in the end. Intel's current generation processors,
like most others of similar performance specifications, break down the
incoming instruction stream into micro ops
([http://en.wikipedia.org/wiki/Micro-
operation](http://en.wikipedia.org/wiki/Micro-operation)), the units of
processing that are actually executed. This renders the difference between
CISC and RISC a case of semantics.

Before this, the idea was that RISC was simpler to implement and could be
optimized more easily, ultimately be more cost effective. What wasn't factored
in was how _good_ Intel is at optimizing, and how hard they'd push their
process, beating the RISC side despite all the disadvantages CISC had.

Now it's the GPU that's eating Intel's lunch, high performance floating point
code on the CPU is several _orders of magnitude_ slower than a high-end GPU,
so Intel's trying to fight back with their "pile of CPUs" strategy
([http://en.wikipedia.org/wiki/Larrabee_(microarchitecture)](http://en.wikipedia.org/wiki/Larrabee_\(microarchitecture\))).
It's not working out very well so far.

~~~
Symmetry
In defence of Intel here, if you look at performance per watt GPUs aren't all
that far ahead of Intel. It's mostly that every instruction an modern CPU
executes is predicted by a branch predictor, makes it's way through several
levels of cache, is run through a reorder buffer and register renaming and a
reservation station before finally being executed. And all of that takes
energy, though it speeds up the rate at which sequential instructions can be
issued by the processor quite a bit.

As to RISC vs CISC, well, it's true that x86 instructions are decoded to micro
Ops inside a modern processor but the fact that the instruction was
complicated does have a cost even for a modern processor. The act of just
decoding four instructions in a clock cycle and transforming them into uOps is
quite a bit of work, on the same order as finally executing them if they're
simple additions or such. And the uOps that make up an instruction have to be
completed all together or else when the processor is interrupted by a page
fault or such it will resume in an inconsistent state. And the first time you
run through a segment of code you can only run one instruction at a time since
figuring out where instruction boundaries are is hard, though you can store
the location of those boundaries with just another bit per byte when they're
in the L1 instruction cache.

On the other hand, complex variable length instructions mean that you don't
need as many bytes to express some piece of code both since you're using less
bytes per instruction on average and because complex instructions mean you
sometimes use fewer of them.

Of course, Intel is the biggest CPU vendor out there and has correspondingly
large and brilliant design teams working hand in hand with the most advanced
fabs in the industry.

Now, there are many RISC instruction sets that have taken on x86 before, but
they all attacked it from the high end, from upmarket. Doing just the opposite
of what ARM is doing now. Will it succeed in dethroning x86 from the low end
the way x86 did to it's rivals? Who knows. But I think that previous fights
don't tell us much about this one.

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pvdm
Chipzilla = Intel.

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bitbckt
The final paragraph sounds like an answer to the AMD/ARM-driven HSA
Foundation.

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mtgx
I assume this is mostly targeted at the very high-end - servers and super-
computers and such.

~~~
vidarh
The vast majority of Power Architecture CPU's, by units shipped, go into lower
end devices, so I'm not so sure that's the only area they'd target.

