tl;dr - Existing technology will be pushed to the limits first. There are lots of new technologies currently being researched, but it's not obvious which will take over. New ideas will "scale over the next 10 years", not over the next 5 years.
Moore's law is not ending because of physical limits. It's slowing down because we don't know which option to pursue.
We are currently at 10 nm [1]. After that is 7 nm (2018), then 5 nm (2020), then 3 nm.
FinFETs will be used at 5 nm. Another technology might come at 3 nm, or later.
3D NAND memory is currently stacked at 48 layers. It will be increased to 96, 128, maybe even 256 layers. The challenge is to keep thin wafers flat when stacking them on top of each other.
DRAM will be around for a while. There are new ideas such as MRAM and XPoint, but DRAM is faster and lasts longer.
Personal addition: Existing technology will get us 2TB SDXC cards. After that we'll need a new industry standard for larger cards.
That schedule is optimistic given recent trends. Intel has been stuck at 14nm process technology for almost 4 years now and everyone else has caught up.
The market's pretty harsh to those who don't catch up. Apple's already started making their own A-series chips. Intel will most likely get their act together soon, or pivot out of the market and move into services like IBM did.
In "The Next 5 Years" though, I think Intel will still be around, and hopefully catch up with the silicon.
Transistor counts are still climbing. These used to be more strongly correlated with performance, but these days it's different.
GPUs have seen exceptional gains generation to generation, ARM is absolutely on fire, and AMD just dropped a bomb with their Epyc server chips. Don't think it's dead yet. It just had a hangover from Intel getting drunk on success with the Core series of chips.
Do those correspond to the most base layers of structure creation and modification on a chip and then the larger structured interconnect layers that get added later respectively?
Moore's law is not ending because of physical limits. It's slowing down because we don't know which option to pursue.
We are currently at 10 nm [1]. After that is 7 nm (2018), then 5 nm (2020), then 3 nm.
FinFETs will be used at 5 nm. Another technology might come at 3 nm, or later.
3D NAND memory is currently stacked at 48 layers. It will be increased to 96, 128, maybe even 256 layers. The challenge is to keep thin wafers flat when stacking them on top of each other.
DRAM will be around for a while. There are new ideas such as MRAM and XPoint, but DRAM is faster and lasts longer.
Personal addition: Existing technology will get us 2TB SDXC cards. After that we'll need a new industry standard for larger cards.
[1] https://en.wikipedia.org/wiki/10_nanometer