I just use a single type of MOSFET, the 2N7000.
I did look at BJTs (in fact the whole thing started because I wanted to teach myself about "proper" transistors) but working out what resistor values to use to cope with varying fanouts/ins etc was too scary for me. One of the fundamental drivers when making design choices was that I really really want it to work when its built, it'll be heartbreaking if/when it doesn't, so I try to favour robustness.
The single MOSFET is also, I'm currently guessing, the cause of the slow speed. If you look at how the professionals (chip makers) do gates they tend to have two versions of the logic, one driving the positive case and the other driving the negative using both P and N MOSFETS. So the output is actively driven either way. My circuits only actively drive in one direction and rely on a pullup resistor (the 10ks) to generate a 1 output. Halves the number of transistors I need, but cripples the speed. I need to do some experiments to prove/disprove that.
I am planning on putting the design files on the website.
And I'm in Cambridge UK as opposed to Cambridge MA.
For a long time (perhaps they still do?) they had a working version of the babbage engine, a circa 1850s six ton mechanical calculator built to solve polynomials . I can't overstate how cool it is; if you're in the neighborhood, they used to do daily demonstrations. Here's one such video 
A small hand-built computer on breadboards you can walk into would seem to be right up their alley.
The implications for teaching are great too. Having this physical reference would really cut the learning curve in computer architecture.
Then we built a micro controller mimicking some simplified early ARM designs in year 2 (ARM was very widely used at the school, I guess the fact that Steve Furber works there played a role). Starting with ALU, decoding, etc. Was pretty awesome :)
In year 3, we built a simple VGA chip and uploaded it to an FPGA with a monitor connected to it. It could only draw rectangles, lines and circles but seeing it actually working was totally amazing. Definitely the best project while at the school.
We were using Verilog and Xilinx toolchain, and that happened at the University of Manchester.
I don't know, i think having a language that supports mixing high and low levels of description to describe a processor and the tools to simulate and play with it could offer much faster learning, since you could focus on learning.
Most people gain a lot of confidence in software development and try to design hardware like they would program a system. And then they complain that Verilog and VHDL is too complex.
In themselves they are very simple, basic languages.
I know they teach Chisel, a higher level language , in berkley. Maybe it fits software engineers and would be fun to design cpu's with.
The whole MyHDL is mostly used for verification though.
Quite the project, I look forward to the final report.
In addition at 33Mhz the speed would be (using speed of light instead of calculating velocity factors):
(the speed of light * 1) / (33 mhz) = 9.08461994 meters
Modern CPUs can run faster since the capacitive load of a transistor is extremely small (since they're nanometers in size), plus the loop sizes of the interconnects are extremely small, lowering EMI emissions.
The first one is pretty easy to understand, the output of a gate changes state and some number of nano-seconds later that output has propagated to the end of the trace. If you're going to do something like "load register" from a bus, when you latch the register flip flops you need to make sure that the input signals are stable (called the 'setup' time) and that after the clock fires to latch the signals that they stay stable to be reliably transferred into the flip flops, the 'hold' time. These values vary for different logic families, and within families vary by temperature and voltage, so a typical timing analysis will include all for 'corner' cases of (high/low voltage, high/low temperature). The whole system can only go as fast as its slowest "setup + hold" time period. And for more complex logic that can "stack" so in the case of the ripple adder, each adder has a setup and hold time before its output is "accurate" and then it feeds into the next bit which has a setup and hold time as well, so you're total time in that adder is going to be the sum of all those setup and hold times. And before you start the add process you need to have the addends loaded into their registers (another setup and hold), and when the add completes the result has to end up in the destination register (another setup and hold). Now typical micro-architecture will have each one of those on an internal clock so the input clock is divided by "n" (where n is 2, or 4, or 8) and on each phase the next thing happens so phase1 things latch into the operand registers, phase 2 they are transferred to the inputs of the ALU, phase 3 they are latched into the destination register.
The second one takes into account that the logic is actually analog (there is really no such thing as "digital" logic) so when a gate changes state, what it really does is start driving (or sinking) a current into a trace to push (or pull) that trace into a ground state or a voltage potential state. Most logic will have a "range" of what they consider one or the other. The waveform on an oscilloscope will show a ramp based on the LC "network" the gate driver sees on that trace. If it is unterminated (which means the trace is not resistance controlled) the signal may rise rapidly or slowly, it may "ring" a bit or not at all and then settle down to the final value. On signal lines that terminated there are a pair of resistors which cause the entire trace to appear as an RLC 'tank' which is tuned to the nominal operating frequency of the clock. Making for nice predictable corners. But the cost of that predicability is that the signals take time to change state so propagation time is slower still.
Finally, and this is the one where you get to put your AM radio next to a computer and listen to the "music" it is creating, each of those unshielded traces are essentially a tiny antenna. And the longer the trace, the more likely it is to radiate rather than propagate the signal. There are particularly challenging issues around even fractions of a wavelength. You can ignore transmission line effects for short distances, you can shield longer traces (put a ground trace on either side) to mitigate losses, and you can reduce the operating frequency.
There are couple of discussions about this in the Horowitz & Hill "Art of Electronics", the DEC book "A guide to DEC hardware" and in a number of digital design text books (I don't know if current ones talk about it but the ones from the 80's did).
It is one of the more interesting aspects of large systems digital design.
You could probably run the long stretches at a much higher clock rate or make the design run on asynchronous clock domains if you use good serialize/deserialize units.
He could have more stages than a Pentium 4.
Cool idea anyway.
You can visit it in the museum. Forgot the name, has a plane on the roof.
He gave a talk when I was there, and afterwards, we where allowed to add some numbers on the computer. You can see the memory banks and hear the relais clicking and blinking.
An interesting fact is that it is a 32 bit floating point machine. Though when I was there he had some issues with synchronising the clocks, so it only did integers then.
A word of warning: you could easily spend days exploring that museum. Fortunately, the computers are close to the entrance, so you probably won't make the mistake of discovering them at the last minute.
On the other hand, the class he was teaching was my assembly language class. And he knew the material inside and out.
> While Zuse never became a member of the Nazi Party, he is not known to have expressed any doubts or qualms about working for the Nazi war effort. Much later, he suggested that in modern times, the best scientists and engineers usually have to choose between either doing their work for more or less questionable business and military interests in a Faustian bargain, or not pursuing their line of work at all.
Which seems true enough to me.
Somehow that makes me very sad.
AFAIK (and I've studied this for awhile) no one has built anything substantial at the transistor level using CMOS architecture. Virtually everyone does DTL, there's plenty of relay based work, this guy is the only discrete TTL family I'm aware of, and I've seen a little RTL logic family out there. That would be interesting.
I always thought the totem output stage of a TTL gate would be "too hard" compared to the other logic families so I got to hand it to this guy, impressive.
A better "vital statistics" comparison would be the DTL logic straight-8 original DEC PDP8 which would vaguely fit on a desk and used about 1500 transistors, 10K or so diodes. It looks like this:
In my infinite spare time I'm going to build a straight-8 using all SMD components (so my cards will be half business card sized rather than half a sheet of paper sized). I'm sure I'll get to that right about 2080 or so at this rate. The advantage of cloning an existing architecture is vast piles of software ready to use.
The disadvantage of using modern high beta, high Ft transistors instead of 60s era transistors is I'm likely to build some great VHF/UHF oscillators instead of logic gates. OP seems to have gotten past this problem, or hasn't run into it yet.
WRT moving parts and "make it like a book" comments, the last thing you want with 50K or so wire jumpers is movement, even if every bend only breaks 0.01% of wires per "fold" that going to multiply up into pain if you swing 10K wires open and closed 1K times. Ribbon cable and standard connectors could help.
Truth, but for this specific issue think of PWM drivers, VFDs, switching power supplies. How about MRI drivers? The specs aren't so bad, really.
So I could play Minecraft, at about 1 FPH(frame per hour) and load that simulation of a 70s era CPU made from redstone. Google for "minecraft redstone processor" and watch the first youtube video.
It's a really cool exercise, however, I imagine that James must spend about 99% of the time soldering, so it's more like an artisanal process than an engineering one. An amazing feat nonetheless.
edit: and this is with complete s/w "stack" as well, including ansi-c compiler, multi-user port of minix-2, tcp/ip stack...
I saw it the first time when I was about 14 y/o, it inspired me to learn a bit about logic and EE, such as how can we build an AND block of relays, and how these blocks are connected together. Eh, good memories, thanks for sharing :)
It's not easy to make good reliable registers. Take a look at DEC's flip-chip designs for example.
I had a boss once who recycled a bunch of arrays from an old phone switch and built a fully working CPU system with 12-bit word lengths and 1024 words of storage. Took days to run some things, but such things are a true joy to have on in the background during coding sessions.
Anyway, thumbs up .. go Megaprocessor, go!
Did you consider ultrabright low power LEDs? Like WP710A10LSRD or WP710A10SRD/E here: http://www.digikey.com/catalog/en/partgroup/3mm-t-1-round-wi...
These give visible light with at less than 1mA.
I shall keep an eye on the progress
The main limitations are heat, frequency, reliability, and thermal stresses.
Heat being mainly for if you're adding more and more to a CPU. With just scaling a CPU up, the increasing size of everything counteracts the longer distances. But if you are trying to add more to a CPU the amount of power dissipation will continue to increase until eventually you can't get the heat out from the center of the CPU.
Ditto, the larger the CPU is the more you will have problems with thermal stresses. Once you get into macroscopic stuff, that is. At current CPU sizes you actually seem to end up with more problems with thermal stresses the smaller you get, due to wires scaling "funny" (edge effects becoming more dominant the smaller you get).
Ditto, if you're trying to add more and more to a CPU eventually you'll hit a point where you can't add more because you'll cost more time replacing bad components than actually running. Some of the early vacuum tube computers had actually hit this limitation, and it is only through heroic "throw more money at it" solutions that modern CPUs aren't limited by this. I mean: you have a billion transistors on a chip. And get decent yields.
Frequency is the big limitation. CPUs propagate signals at ~0.1c already - which means if you scale them more than 10x the size (or ~2x for PCB-style traces) you cannot maintain the same frequency. Remember: your frequency dictates how long the longest wire through the CPU that gets updated in a single clock cycle is. If your CPU is larger than c/f in diameter, you cannot send a signal to the other side of the CPU and back in one clock cycle - at which point it may as well be multiple CPUs.
I look forward to this particular use...
They have one that stores info in a ten-state neon tube which looks as cool as you might hope [see edit].
Turing didn't even have that, they used Acoustic Delay Lines, which could "store" a state for as long as it took a pressure wave to propogate through a long tube.
To "write" you do (or do not) send a pulse at the appropriate millionth-of-a-second time slice. To "read" at a certain time later (of the order of a thousandth of a second), listen at the other end in the appropriate millionth-of-a-second time slice for the slightly-degenerated pulse. To store for longer than a thousandth of a second, re-send any detected pulses, and remember which pulses are which.
The tube can be filled with anyhting cheap enough, thaat propogates signals as slow as possible, without degenerating them too much. Fun fact, when building the ACE Turing "rather hankered after using gin, which would come cheaper than mercury". Mercury was eventually chosen, hence they're often known as Mercury delay lines.
The machine is called the Harwell Dekatron or WITCH. And it looks and sounds as impressive as its name. See a program being run on it at the link below. Demo starts at 13:00.
The spinning lights are the transistor equivalents. Each one able to be read which of the ten possible positions the light is in, and advanced one step.
(I see uBlock blocks sourceforge now, amusing)
Awesome project! I felt nostalgic when I saw the adder -- it's right out of a textbook.
I aways has ambitions of building something like this but never the motivation.
I built a full adder and that was as far as I could stomach the job.
Not as ambitious but I often dealt with building computer systems, including the processor, from the TTL chip level back then. They were still sophisticated, along the lines of what would be called RISC architecture.
You really, really knew how computers and their processors worked back then and God how I miss it.