The FAQ heavily downplays the fact that it is a highly derivative architecture from MIPS. Yes the exact encodings are different, and there are a few differences in instruction but of the kind you might expect from a revision of an ISA.
To the point where the Linux kernel port for the architecture was a straight copy and paste of large parts of the assembly code from arch/mips (with the replacement of the copyright headers being among the largest changes in some cases).
Sadly it's exactly what you would expect of a Chinese ISA.
I'm the author of the FAQ. Of course the ISA is basically MIPS R6 with encodings and ABI replaced, to the uninitiated, and there is indeed an ongoing case of CIP United v. Loongson Corporation about the IP rights infringement. Just look at the privileged architecture and it's immediately clear it's just Loongson 3A4000 (a MIPS R5 implementation but with unauthorized and incompatible modifications here and there) only with the decoder stage replaced.
As for the "downplaying" of facts then: the original article is in Chinese, for a Chinese audience whose sentiment towards Loongson (or just about any "domestic CPU" development) is quite different from the typical Western think; so I have to tone down a little to maintain neutrality, both for presenting the Loongson side of argument, and for not needlessly enraging the more radical readers. And it certainly seems the translation has this "quality" preserved enough to be noticed...
Anyway, although the 3A5000 is remarkably faster than its predecessors and all RISC-V offerings that I know of, and is readily purchasable (which is the main reason I'm doing LoongArch work btw, uptake of this architecture may even help RISC-V in the end), the company may well not be worthwhile to support; it's already an entirely different company from the old Loongson 2F era. As we actually have enough Loongson criticizers even in China, I think I'll edit the FAQ to include more critical opinions (in both versions, of course).
> with the replacement of the copyright headers being among the largest changes in some cases
I'm surprised they let that fly. Removing existing copyright headers from code you copy wholesale is a very bad idea, even if the license is compatible. Especially if you're making a copy as a new file, so there is no Git history to trace past authorship.
Right, it's not acceptable at all. I think it was called out and they said it would be fixed. Not sure what the state of that is now.
Ordinarily I wouldn't assume that is more than a careless mistake, but with the deliberate and pervasive downplaying of the relationship to original works it's not a very good look.
Not to defend CPP-copy-paste, but MIPS has always been an open architecture (it is even open source now, you can get CPU verilog code from them). They did however hold some important patents that they used against others back in the 90s.
This makes riscv claims about having the first open ISA untrue, but that's a whole different discussion.
> Not to defend CPP-copy-paste, but MIPS has always been an open architecture (it is even open source now, you can get CPU verilog code from them).
I don't know that it has always been completely open. They have had licensees in the past, and it has been opened then closed at least once in the past, by the looks.
At any rate I don't really know what the status of the MIPS architecture is or its owners' relationship with the LoongArch people. I'm not suggesting they are in breach of copyright or any private agreements with them.
But it really is just MIPS. They tidied up a few minor things like delay slots, and adding some basic vector stuff, and tweaked instruction encodings. Then rebranded the whole thing and did copy-paste jobs on large swaths of code when submitting their architecture "ports".
My main question here would be - what's the point of bringing up yet another new ISA in a world where RISC-V (which is free, open and extensible) already exists and is gaining steam?
I remember at a lecture in my school, Weiwu Hu, "Father of Godson", said RISC-V "is not well designed". Another reason is probably that since Loongson's debut in 2001, they have gained a lot of familiarity with MIPS ISA. Also, I guess Godson's main customers may be governments, who care more about security and "self-controllable" than ease of use.
Weren't they using MIPS previously and only recently came up with the new ISA? From the Wikipedia article you've linked to:
> Loongson moved to their own processor instruction set architecture (ISA) in 2021 with the release of the Loongson 3 5000 series.
So, again, the question is - why just not switch to RISC-V at this point?
...unless this isn't actually very different from MIPS, and is just a renamed clone of MIPS, but they're pretending like it isn't? (Which would answer my question.)
From reading the FAQ it appears to be MIPSish with arbitrary changes and minus the vector extension, with a riscv inspired abi.
As for why bother, the goal of the project is Chinese independence from Western tech. Therefore it must be "different" but not different enough to cause much actual work or problems.
Think of it as an ISA with Chinese characteristics.
Well, one of the designers of RISC-V was Dave Patterson, who was also the main force behind MIPS 25-ish years earlier. So it's meant to be an improvement, a 5th generation RISC architecture, not just an equal alternative with a different license.
I don't know much about the differences, but the system of standardized extensions is pretty cool and makes the same base architecture applicable to a wider range of applications.
To the point where the Linux kernel port for the architecture was a straight copy and paste of large parts of the assembly code from arch/mips (with the replacement of the copyright headers being among the largest changes in some cases).
Sadly it's exactly what you would expect of a Chinese ISA.