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RVVM – RISC-V Virtual Machine (github.com/lekkit)
128 points by rvenjoyer 3 days ago | hide | past | favorite | 16 comments

More emulators listed here:


The most popular emulators are qemu and spike. There are even a few emulators written in Rust that aren't on the list:



I've messed around with Terminus the most.

Another, special one: https://github.com/gamozolabs/fuzz_with_emus

It's a RISC-V emulator specially made for fuzzing software.

There's no documentation about it in the repo but the guy that wrote it streamed much of the development of it on Twitch and has put those videos on YouTube. He is also on HN.

I took a quick skim of the code and nothing obviously popped out at me. How do you preserve architectural behavior of the emulator while 'fuzzing'? How does the emulator know where the boundary of the code under test is?

Is this work being done by an enthusiast, a company, or something else?

I'm glad it's being done, just curious to know if there's a company with a profit incentive behind it. I don't say that as though it's a bad thing - there are tons of benefits of that. Just trying to understand what's happening.

Regardless, thank you for your efforts! I dream of a day when I buy a high performance RISC-V machine to use as my workstation.

There's no company behind, the work was done purely on enthusiasm. The main purpose was education and, because RISC-V boards are not widely available, software porting - including RVVM itself - I ran it on N900, but it was not so fast as I expected. Hopefully this will be resolved when JIT will be finished. As for other projects - Xash3D server was ported to RISC-V thanks to RVVM.

And saying that you've written a virtual machine sounds cool too :)

How much time did you take to write the emulator? I am very interested in emulation and have been with wrestling with Qemu for quite sometime now to port an architecture to it. I find it needlessly complicated though.

Time required depends on complexity of the target architecture, desired performance and debugging, which is probably the most time-consuming.

At the beginning when interpreter wasn't tested yet we had a problem of Linux kernel crashing at the early stages of boot, IIRC that was memory setup. However, the bootloader (OpenSBI) booted correctly. Initially we thought that there was something unimplemented in the emulator, but it turned out there was a bug in one compressed instruction. Debugging this was a nightmare. After the fix kernel booted right to the userspace startup. So booting Linux took us about 2 months of work in total.

If you want to go form scratch compilcations will start to appear when you go out of the CPU and start implementing devices. You'll going to need them anyway because you'll want to boot from disk image or move a cursor in X :). Devices are independent of the CPU architecture and have their own standards, so implementing them will take some time too.

It seems like people like writing emulators for fun, or to learn a particular architecture.

> Framebuffer graphics, working Xorg with mouse & keyboard

How performant it is? Does it feel usable on a mediocre host PC?

Yes of course. I've not tested modern DEs because the emulator is still RV32-only, but xterm with twm works very good.

It's still works with interpreter with 1/3 of QEMU performance. With JIT (which is still WIP) it'll be even faster.

Twm is slow on rendering. Choose fvwm, ctwm or cwm.

Source: I tried it on OpenBSD on a "moderm" machine (2007_ and with a medium-high load you could see redraws going on.

This never happened to me with FVWM or CTWM.

> Framebuffer graphics, working Xorg with mouse & keyboard

Time for someone to port Oberon again? :)


Answering in good faith here...

It's a virtual machine for the RISC-V architecture, as is evident from the title.

A virtual machine is software that emulates hardware.

RISC-V is an open-source processor architecture that allows anyone to design, build, emulate and modify the CPU architecture without fear of legal repercussions. RISC-V is currently becoming quite popular due to the release of actual hardware, with more coming in the near future.

Nitpick: In the general case, a virtual machine doesn't necessarily emulate hardware, it might just be an abstract specification (e.g. the Java JVM)

The JVM still is an abstract specification of computer hardware (instruction set, register set, memory organization). That it wasn't designed for hardware implementation is a very minor nitpick.

But then someone did do a hardware implementation:

https://www.jopdesign.com/ https://github.com/jop-devel/jop

"Due to the small size of the processor, it can be implemented in a low cost FPGA. ..."

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