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> [1] The biggest exception to the rule is custom hardware (particularly embedded, but this also holds true for mainframe and HPC systems), where custom compilers come for the ride.

This is exactly what RISC-V was created to address. People here get excited about running Linux on it, but really the goal is to have a flexible, extensible ISA that can be used from microcontrollers [1] to DSPs, GPUs, & TPUs. Full-on Application Processors, with their FPUs, MMU & Cache, are only a small part of the design space of RISC-V.

The shared ISA means the rest of the stack could share and leverage tools. Any day now ;)

[1] https://www.espressif.com/en/news/ESP32_C3




For this information, I recommend viewing Dave Patterson's "50 years of Computer Architecture" talk:

https://www.youtube.com/watch?v=HnniEPtNs-4

Dave Patterson is one of the creators of RISC-V, and his credentials include pioneering RISC, the original concept.

https://en.wikipedia.org/wiki/David_Patterson_(computer_scie...




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