Sprites have precomputed shifted versions so they can be drawn with fewer than 8 pixels alignment.
The number of cached sprite versions can be set per sprite, and ranges from 1 to 4, so sprites can never be placed at odd pixels.
EGA has hardware scrolling to compensate for the 8 pixel wide bytes, where you set the ”pel panning register” to a value from 0 to 7. For some reason, Keen Dreams ANDs this with 6, removing the last bit. I’am guessing it is to avoid stuttering when the player sprite moves sideways at the same speed as the viewport is scrolling.
Since high school I've wondered what those registers in the 0x3c0-0x3cf range are for. I found them in a book somewhere and started writing to them to see what would happen. The only one I found interesting was the PEL mask register, which was useful for practical jokes at school (I wrote a TSR to write to the register periodically, causing the colors to change).
This is the first I've heard of someone using one of these registers for something useful. It's a shame I can't send this knowledge back in time to my former self.
Sprites have precomputed shifted versions so they can be drawn with fewer than 8 pixels alignment.
The number of cached sprite versions can be set per sprite, and ranges from 1 to 4, so sprites can never be placed at odd pixels.
EGA has hardware scrolling to compensate for the 8 pixel wide bytes, where you set the ”pel panning register” to a value from 0 to 7. For some reason, Keen Dreams ANDs this with 6, removing the last bit. I’am guessing it is to avoid stuttering when the player sprite moves sideways at the same speed as the viewport is scrolling.