For those who are interested in REading IC layouts from pictures, Ken Shirriff (kens, righto.com) has a lot of great articles on his site about the process as applied to other vintage ICs:
I don't read ICs much in my line of work, but the basics are very easy to understand and much of the effort involved is "mental floodfilling", whose speed varies between individuals --- even after lots of practice it takes me a bit of time to find all the edges, but I know someone who can read a die photo faster than she can draw a schematic of the area.
On the C128 it is also involved in the DRAM refresh handling.
The C64 PLA was originally a programmable device, the Signetics 82S100. Later version were MOS/CSG copies of the same device but programmed with changes to the manufacturing masks instead, similar to the difference between an EPROM and a Mask ROM.
For a lot more detail and background, I can recommend reading Thomas Giesels excellent paper on the C64 PLA, found at http://skoe.de/docs/c64-dissected/pla/c64_pla_dissected_a4ds...
> A gate array is an approach to the design and manufacture of application-specific integrated circuits (ASICs) using a prefabricated chip with components that are later interconnected into logic devices (e.g. NAND gates, flip-flops, etc.) according to a custom order by adding metal interconnect layers in the factory.
PLA's job is simple: it basically contains a lot of combinational logic, transforming some inputs to some outputs. It generates a CS output based on a memory address and bus signals, it's just an address decoder, you can build the decoder using a large number of logic gates, but it gets messy and expensive. You can build a full-custom ASIC for it, but it's expensive and unnecessary. The point of PLA is allowing one to create a custom logic circuit to replace combinational logic by burning the logic on a general template, it was the right tool for the job.
Even today, modern equivalents of PLAs are still used. Some companies provide FPGA-to-ASIC conversion service using mask-programmable array, it allows you to burn your FPGA design to the silicon for a moderate performance boost, without the complication of ASIC redesign.
I don't think they sold them to other companies, MOS was at this stage fully part of Commodore. Commodore was really big on vertical integration, they didn't like buying components from other companies if they could help it. They even manufactured a few 74xx logic chips sometimes used in their 8-bit computers.
PLAs have a few benefits over ROMs in that it can represent a subsection of a logic space and can also handle custom inputs / outputs like "Don't Care" or "High Impedance" / "Z state" / "Disabled" which a ROM can't do.
On the ZX Spectrum iirc it implemented the entire display.
The sound, and just about everything else, was not mapped to memory but through an I/O address space which the Z80 and 8080 (and 80x86 and even AMD64 still have.
This address space, pins, chip select, etc were all distinct from main memory - unlike the C64 where everything was memory mapped.
Does that HDL part mean it can be fed into an FPGA?
The other part of reverse engineering something like this is to figure out the other parameters of the chip, e.g. propagation delay, slew rate, output voltage profile etc. etc.
I always admire folks who can dive deep on something obscure like this.
Some of the Signetics parts in this databook have latches:
at first i was uninterested in this project since the function of the PLA is expected to be very well known. to write an emulator or do intense programming one needs to know this and I expect most of the info to do it is made available by Commodore.
but then i viewed the project more deeply and realized it's more about the project as a whole, how the author made the dieshots