Henry Warren, the author of Hacker’s Delight, is one of the authors of this book.
Chapters 3, 5, and Appendix D have some neat examples of bit twiddling code in Power assembly language.
The content overlaps with that of Hacker’s Delight and Bit Twiddling Hacks.
I tried to see if this doc had anything about calling conventions for 64b parameters on 32b ILP32, but alas...(at least a cursory skim of `A.1 Procedure Interfaces` came up empty).
Another fun fact I learned about PPC assembly for that bug is that without `-mregnames`, it can be hard to distinguish between registers and constants in compiler generated PPC assembly. Official docs from IBM (https://developer.ibm.com/technologies/linux/articles/l-ppc/) say "Get used to it. :)" LOL
PowerOpen is still a thing for 64-bit, see https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-...
As memory serves me, on 32-bit you would pass a 64-bit value in adjacent 32-bit registers in big-endian fashion.
(purely selfish - I have no nostalgia for early OS X but classic MacOS was where all the fun was and that's what my PowerBook G3 boots in to)
I need to set up stunnel or an Nginx proxy to deal with the lack of SSL support. That's up next I think.
You could, in theory, run code generated by your own compiler on a PPC chip you designed and built with your own hands and brain.
Random thought: would it be feasible to implement PPC on an FPGA, as has been done with RISC V?
Anyone know offhand what’s the most powerful PPC system you can readily buy? I’m guessing it’s one of the PPC Mac machines.
Admittedly the latter is a $15k machine, which is perhaps may be pushing what you had in mind for "can readily buy", but it's for sale...
The T2 is a great machine, though. There's just no comparison to the Quad G5 sitting next to it. It's quieter, it uses less power and it doesn't feel like I'm lacking for CPU. I got a lot of wear out of the G5 and I'll never get rid of it, but if you don't need 32-bit and/or to run OS X on the metal, the best Power workstation is a Raptor.
Xilinx, FPGA maker, embedded PowerPC in the Virtex-II Pro, Virtex-4, and Virtex-5 FPGAs
Xilinx introduced Virtex-II family in January 2001 on 150 nm process technology, and Virtex-II Pro family in March 2002 on 130 nm process technology.
The actual silicon-proper, not sure, but one could definitely implement the ISA.
If I'm not mistaken IBM haven't given away any actual synthesizable logic to use.
If not, there's at least https://github.com/antonblanchard/microwatt
And the most powerful POWER system you can buy would be something based on the POWER9 processor.
Why not? It is well specified so should be quite doable.
Your best bet is a VAR (that's how I got my POWER6 when IBM wouldn't sell me a POWER7), or a company like Raptor, who actually sells retail.
“The rotate instructions (like the rlicr seen here) are notoriously complicated, and having jokingly been called Turing-complete”
"IBM has a well-known disdain for vowels, and basically refuses to use them for mnemonics (they were called on this, and did "eieio" as an instruction just to try to make up for it)."
- Linus Torvalds, 2009
There is "stfsux" though.
I like rlwinm which takes five arguments. It can do so many things there are like 12 alternative mnemonics for simplicity.
Instruction set philosophy
A common misunderstanding of the phrase "reduced instruction set computer" is the mistaken idea that instructions are simply eliminated, resulting in a smaller set of instructions. In fact, over the years, RISC instruction sets have grown in size, and today many of them have a larger set of instructions than many CISC CPUs.
The term "reduced" in that phrase was intended to describe the fact that the amount of work any single instruction accomplishes is reduced—at most a single data memory cycle—compared to the "complex instructions" of CISC CPUs that may require dozens of data memory cycles in order to execute a single instruction. In particular, RISC processors typically have separate instructions for I/O and data processing.
The term load/store architecture is sometimes preferred.