Every single one failed with an error.
The first one failed with an error that didn't specify the reason, the second one because it had more than 200 wires, though I wonder how that's possible on a 3x3 macropad PCB, and the final one failed with "Sorry, we do not support non 45° rotation for this beta version".
The errored projects count towards the limit of 3 projects you can create.
Doesn't seem to be working all too well.
We have that already, we call it GAN.
You could also (ab)use electrical engineering students, might take a bit longer though.
But routing has indeed become very cheap. I still could see this service as useful, especially for the amateur prototype market. There are a lot of software devs that immediately die if they come in contact with electricity in any form.
But they might still need some hardware. And maybe they could offer some templates where you can just add the chips you need right now.
It would take longer to train them, PCB design isn't taught in much depth to undergrads at least in the US.
But if you only take a schematic, and the design is sufficiently complex, it's already difficult if you hand it to another engineer who's not too familiar with what is being done, let alone a machine learning model.
24 hours? That's an East Asian subcontractor.
IIRC routing from a schematics has been proven to be a NP-hard problem.
It seems like all component positions need to be fixed first, then it routes between them. That’s based on the examples, fact that it takes DSN input files... and output SES files.
The SES files appear to contain traces only. So I assume you import it over your fixed component locations.
I just tried uploading a board DSN file (exported from kicad)... the only feedback I got is “Board Error”... there’s no indication what the error might be.
It seems to be at quite an early stage of development...
Edit: after logging in, I can see an error “Sorry, we do not support board has more than 400 pins for this beta version” (sic). All the examples are very simple boards... so perhaps I’ll try something else.
That information simply isn't captured in current schematic software. Until it is I can't see autorouters being effective.
I can see a world where every schematic includes simulation models, and the autorouter uses simulation data to know exactly what frequencies are moving down each net and in each location. That requires detailed spice models of every component on your circuit though - so it probably wouldn't save the designer any time anyway as they're just doing different work. I'm not even sure how you'd simulate the signals coming out of a microcontroller - how does the autorouter know that one PWM IO is producing a 500kHz clock into a high current switch and the other PWM IO is producing a fixed 3.3V?
So then maybe you need to incorporate not only simulation models, but your actual CPU code. Which then means you need high quality microcontroller and FPGA emulators. There's a new problem!
There's probably a middle ground - a designer could annotate each net with a waveform which would be fed into the spice simulation - but even then we're talking significantly more work than just laying it out yourself.
Have a test where a specific pin on the processor is set to a 500 kHz and have tests for certain conditions, emissions below a certain level, interference with some other trace, etc.
Everything with hardware development seems to be at the stage of a neglected codebase with manual testing, poor test coverage, and slow process. We're just at the point where many of those problems are solvable now with pretty good actual EM simulation.
Lots of features need to be added but it all just seems very possible at this point.
2 layers is super limiting!
24 hour turnaround is actually quite slow... I would bet they have a human in the loop.
24 hours, however, is a little bit long.
It would be nice to see exactly what they are offering before uploading a file, right on the front page. Some components absolutely need to be in a fixed position, some can be moved around... Some have RF requirements... Does it minimize size? Does it brute-force the traces?
Me too. Altium is a reasonably good tool, but I would be super happy if its monopoly on professional electronics design would be broken.
It takes dsn input files and outputs ses files (if the examples are accurate).
The ses files appear to contain traces only. So I assume you would import these over your already laid out components.
Perhaps two layers is for the free version?
There doesn’t seem to be anything Kicad specific, maybe they’ve only tested it with Kicad. It seems to come from a team doing a bunch of AI stuff, not a hardware focused team. So I can see there being issues.
I’m curious to see how well it works though.
Sadly another project designed by a software/AI guy who has little to no clue about the problem they are trying to solve.
When all I have is a hammer everything looks like a nail ...
I wonder whether this is from the same clueless people who were trying to sell an idea of AI-generated board layouts on Reddit not a long time ago.
Figured AI routing was a matter of time. Though I’d be more happy with a “guided” AI layout. Often I want some general layout with parts but don’t care too much of the specific routes. It’s tempting to add a more advanced routing tool to KiCad...
To quote a colleague: "Altium is used by those who are forced to do so"
The real reason why companies are invested so much in it, because they have knowledge in it and huge design libraries.
Now offering a way to convert those properly to KiCad and giving support for edge-cases, that would be a business opportunity.
I last used kicad in 2014 so perhaps my opinion is dated, but there was no competition then. I can't imagine an order of magnitude improvement has happened since.
Other random thoughts: real boards take weeks because signal integrity had to be taken into account. If I can just mash wires from point to point it doesn't take that long. Also: hobbyist kicad users won't pay for this service.
No expertise necessary - who the heck is the target demographic? Who is doing custom hardware these days that finds the PCB layout part of the design difficult (but amenable to autorouting?)
If this is the first rung of the ladder and it's all up from here, good luck - I'm sure we all hope you nail it.
A good comment here about placement - I hope that this approach can grow to adjust placement to some degree, even if not complete placement control.
Yes, this is the point. It's NP-Hard. If you solve this problem, you can make far, far more money doing something besides routing mechanical keyboards and Internet of Things sensor cruft.
Autorouters have been in development for the last fifty years, starting with wire-wrap machines at Digital, and going on to the work of very, very smart people at Altium and Autodesk. The smartest people in their field have been working on autorouters for decades, and this company wants to solve it with 'the cloud' and 'AI'. Sure, buddy.
150 pairs and 2 layers is abysmally limited for anything but the lowliest hobbyist (read: poorly designed) boards, and there are no examples whatsoever of what this product produces. Like, really, great job for producing a demo to show to investors but you might also want to demonstrate your demo.
Oh, and if you're using machine learning on PCB design, that means you need to train your models somehow. That means your training data is absolute crap, because most designs for Open Source hardware are objectively crap. You would be better off paying someone in China $40 to lay out your board, which would also have a 24-hour turnaround. Which brings me to my next point...
I expect if you search the literature you'll find a ton of work on this.
“This is an unsolved problem… Yes, this is the point. It's NP-Hard”: "We harness the power of advanced AI and deliver results in less than 24 hours...", which is a red flag” InstaDeep has built credibility in AI circles by innovating in Machine Learning and Reinforcement Learning (RL) specifically on how to find good solutions to NP-Hard problems with AI. For example, you can check our R2 paper (https://arxiv.org/abs/1807.01672) about AI for combinatorial optimization which was accepted at the NeurIPS 2018 in the Deep RL workshop. More recently we’ve just published joint AI-research in RL with Google DeepMind that earned a top 2% global ranking at NeurIPS 2019 (https://arxiv.org/abs/1905.12941). We also have specific domain expertise in Hardware: some of our team members have worked for more than 15 years in this field in companies such as STM, NXP, Dialog, etc. We believe it’s an exciting time to be working on PCB Routing, an NP-Hard problem.
“ I would bet they have a human in the loop”: No our system is fully automated (which is why it’s a first) so bear with us as we are in beta :) Automation is possible because we use RL, which is very useful for decision-making problems like PCB Routing. At InstaDeep, we deploy RL systems in the real world and work closely with hardware partners such as Nvidia (we’ve recently been upgraded to preferred partner) and Intel (we’re part of the AI Builder Program). In our opinion, having no-human in the loop is critical to accelerate PCB development cycles, and that’s a key feature of DeepPCB.
“Shitty auto routers have existed for 25 years, at least.”: that’s the whole point, autorouters don’t get the job done properly, which is why many boards are still done manually. It makes sense that AI could improve things here.
“the hardest part of PCB routing is Placement”: totally agree here, and our goal once DeepPCB routing is out of beta, is to tackle placement. Routing is an important first step, but we don’t plan to stop there. In our livestream (https://www.youtube.com/watch?v=Ea5i-l8YKQo) a few days ago we clearly mentioned that Placement is our key goal for next year.
“I exhausted the 3 project limit trying to see how it would route”: we hear you and have decided to increase the limit to 4 credits per week. We’ve also regenerated the credits for everyone already registered! We will periodically review credits based on demand to accommodate as many users as possible. If you would like more credits please contact us!
On a final note, keep in mind we’re in early beta and our goal is to hear from you to iterate and improve the product better. Things might break from time to time and we’ll certainly make mistakes but what matters to us is to keep working hard and make progress on this exciting problem. We believe it’s the combination of Hardware domain expertise and advanced AI know-how that yields strong results. If you agree, don’t hesitate to reach out at firstname.lastname@example.org we’d love to hear from you!