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KiCad Joins Linux Foundation to Advance Electronic Design Automation (linuxfoundation.org)
143 points by paddi91 on Nov 24, 2019 | hide | past | favorite | 49 comments



Hopefully, EDA tools for chip-design will get similar attention too, as well as a "normal" CADs. Software like LibreCAD[1] and FreeCAD[2], Qucs[3], gEDA[4], Yosys[5] and Symbiflow[6], Chisel/FIRRTL[7], OpenROAD initiative[8], Degate[9], and many others.

[1] https://librecad.org/

[2] https://www.freecadweb.org/

[3] https://github.com/Qucs

[4] http://www.geda-project.org/

[5] http://www.clifford.at/yosys/

[6] https://symbiflow.github.io/

[7] https://www.chisel-lang.org/

[8] https://theopenroadproject.org/

[9] https://github.com/nitram2342/degate


Is there a high level overview, for programmers, of how chip design software works? Something I eventually want to investigate is building some of those pieces of software but I have no idea where to get started learning about that ecosystem. From a software perspective I have a good understanding of how source gets turned into machine code, which gets packaged into shared object code, which then gets linked into a binary. How do those steps work for HDLs? What standards are involved? How do you test that each of those steps works?


The GP mixed up hardware compiler and board layout tools.

KiCad (funded by CERN) and LibreCAD are pretty good PCB layout and routing tools. Since Autodesk bought Eagle, they're the Open Source "great hopes."

For PCB tools, you should just join an existing project since there's several Open Source ones and we need better ones, not more. This is a suitable long-term hobby if you occasionally make boards yourself. Especially welcome if you work on the parts library UI and items.

Chisel, etc. are hardware compiler tools, not board layout tools.

You should get a job at a chip or HFT company and have them pay you to learn and apply this stuff.

The commercial software is shitty since the vendors spend more on keeping their license dongles up-to-date than adding features.

Source: worked at a company that designed a 400 million transistor chip. Most of my X-co-workers worked on the A11 and A12.


Take a look at Verilog-to-Routing - an educational/research tool that is open-source.

https://github.com/verilog-to-routing/vtr-verilog-to-routing


That looks like a great resource! Thank you!


Start with an electrical and computer engineering course. Some eda tools are literally fancy vector graphics engines. Some are em simulators wrapped up. Others are circuit modeing tools.

It's not really like programming. The tools are deeply integrated into the physics of the system.


> It's not really like programming. The tools are deeply integrated into the physics of the system.

What specifically makes electronics different from modeling other systems with software? DSP immediately comes to mind as something that is explicitly tied to Maxwell but there is really good software out there for describing, modeling, and creating signal processing components similar to how you'd write software. An example of this could be GNU Radio.

Is there something that prevents the creation of workflow automation tools, abstractions, and "compilers"/DSLs?

Do engineers at Intel, AMD, and Nvidia manually lay out each feature in their chip designs? If not, what workflow tools have they developed internally? Could those tools, or similar, be used for smaller scale circuit design?


There’s nothing fundamentally different about modeling electronics. It’s just that modeling nonlinear dynamical systems is a tough nut to crack, be it electronics, weather, heat transfer, whatever. SPICE is pretty good at it, but the newer modeling tools (that dates to the 1970s) are proprietary.

As for the DSLs/workflow/etc there are companies in this space.


> Do engineers at Intel, AMD, and Nvidia manually lay out each feature in their chip designs? If not, what workflow tools have they developed internally? Could those tools, or similar, be used for smaller scale circuit design?

The answer is yes, but of course not exclusively. There was an English talk at ccc a while ago by an AMD engineer with lots of details on the whole process.


Not every feature, typically there will be a physical team that will lay out a gate library, data paths and srams for any particular process - but the bulk of the gates are laid out by CAD tools from high level languages using gates from the gate library


I haven't personally taken these so can't comment on quality but there is:

1. https://www.coursera.org/learn/vlsi-cad-logic

2. https://www.coursera.org/learn/vlsi-cad-layout


EDA tools are a different beast... There is a reason why the field is completely monopolized by the big three - Cadence, Synopsys, and Mentor Graphics.

And a lot of the tools you mentioned are targeted towards FPGA design rather than full or semi-custom ASIC design. The big three have tools that can handle both.


Let’s not get ahead of ourselves. Relative to something like Microsoft Office they’re tiny and we have open competitive solutions there (a product notorious for a billion corner cases).

And let’s not forget “EDA software” was single handedly pioneered by one woman and some lisp. Before then, it was hundreds of men taping out circuits on 4x8’ ply with...physical tape who all complained the labor and complexity costs were enormous and nothing could be done.

If we really want to point fingers, we could say it’s a monopoly on the supply chain side of manufacturing - costing millions in NRE’s to make a chip - but if you are willing to scrimp on process size you can get it done for $3 per layer per reticle at 500nm scale and $50 per mask.


To make things more concrete than "big" or "relatively...tiny", some quick googling puts Cadence's annual R&D spending at a little less than $1B and Synopsys's around $1.2B. Mentor Graphics is part of Siemens, so that'd be harder to figure out.


It’s a strawman. I never used “big” in an absolute sense, so it’s implied that I meant “big” in their field.


Since you seem to know, what company would one go to for fabricating a 500nm chip these days at that price?


500nm feature size is positively ancient. Any of the myriad fabless companies won't even care about those dinosaur technologies.

I would try the local university with an electronics program.


Are you seriously trying to compare document processors to state of the art EDA tools?


Kicad is an amazing tool. Not easy to get into, kind of like vim in that regard, but when mastered, it's really powerful.

With that in place, I wish it had:

   . Something to import LTSpice files directly into its schematics tool (or even better, go back and forth)
   . A rough but well integrated auto-router
   . A better parts library management system (the current one is really bad).
But even without those, designing electronics circuits with KiCad is a blast once you've mastered it.

And it's free ...


You can try gEDA topological autorouter Toporouter: https://youtu.be/NqT4ZYGB3VY

You can also use TopoR autorouter for free: https://en.wikipedia.org/wiki/TopoR

Topological routers make really interesting board designs looking like something retro or biological in its nature :)


I did try TopoR back in the day, but the lack of integrations was IIRC a PITN.

I've not tried Toporouter and will go paly with it, thanks for the pointer.


Library management is a little messy, but on the other hand it’s great that the master version of it is just a GitHub repository. That makes it really easy to pull down the latest, add new parts as you work on a project, and submit pull requests to share them back.


I remember there was a company trying to make "EDA library" as a service with online API.

I wonder if they are still around and if one can use their API from KiCad


> A rough but well integrated auto-router

If you're depending on an auto-router, you're doing it wrong.


There's a lot of autorouter hate in the electronics community which I think has a basis in truth, but is in danger of losing sight of the big picture.

Autorouters can be terrible. They mainly are. The reasons are partially with optimisation algorithms (although these are getting better), but primarily with poorly defined constraints.

Currently a schematic holds the physical connections and maybe a little bit of extra data - some pins might be "power" pins, or maybe a net or two is defined as a high current net - but broadly the circuit metadata which is highly relevant for routing is held in the designers head.

When you lay out a board you're always thinking about high current and high frequency (and especially high current high frequency) paths. You're looking for paths to ground, you're isolating sensitive analog regions from noisy digital regions, you're making sure the ground plane is uninterrupted. You're basically making thousands of tiny tradeoffs based on an understanding of what the board should be doing. If a computer doesn't have that knowledge, of course it can't effectively lay out a board.

If we can improve schematic annotation and part representation to properly hold this information then there's absolutely no reason autorouters can't be better than manual layout. If we can combine it with simulation then autorouting should really be the only logical choice. If you can almost completely avoid EMC testing by carefully defining all the high frequency nets and letting the autorouter find a design which is optimised for RF performance, then why wouldn't you? An EMC chamber costs thousands of dollars a day - you can easily spend 10s of thousands just on the testing alone, not to mention redesign costs.


There are tons of rule of thumb routing design choices made that lead to being able to route incredibly complex PCB's which becomes a topological problem. Rules that would need to be either programmed into such a system, or somehow potentially AI could use a huge corpus of board designs and schematics to make a better auto router.

My point is that as they stand currently, autorouters are absolute trash and you should not be depending on them.

The only real place they work is when you have a trivial routing situation but it would be incredibly tedious to route by hand, like a bus with 100+ traces or something.


I'm not depending on an auto-router, which is why I went through the exertion of adding the word "rough" in my post. Auto-routers are a very nice time saver to get something going quickly.

Also, you have strictly no idea what kind of design I'm working on and therefore no idea what constraints - or lack thereof - I have to deal with when I design boards.

Finally, I've heard so many boomer EDA folks spew out this lame argument ... it's the same old tiresome song from folks who use to claim compilers could never beat hand-crafted assembly. They're very seldom heard from these days.


If you have design requirements that warrant using an auto-router, I don't think you'd be posting on HN asking for it in an open source CAD package.

No, they're not for getting anything going quickly. Route it yourself so your boards don't look like absolute garbage. Unlike a compiled programming language, aesthetics matter, and you get no optimization from an autorouted board unless you're doing something like routing the exact same trace a hundred times over for some super simple parallel bus.

Which, again, I'm pretty sure you'd know what you were doing enough to not ask about an autorouter feature on HN if that were the case.

This coming to you from an early 20's "boomer".


You can simulate using SPICE in KiCad now (ngspice).

KiCad already has an auto-router?

But yeah, parts management is a mess...


>You can simulate using SPICE in KiCad now (ngspice).

Yes, but LTSPice is so much better than ngspice. I really wish the Linear would OpenSource it, it's a really cool piece of software.

KiCad does not really have a very well integrated auto-router. As someone pointed out, the only "integrated" one was deprecated, and all the others I've tried are very clunky (from the pov of being integrated).


KiCad's native autorouter was deprecated a while back (unless someone added it again in a recent point release)


I've had very good luck with this build of FreeRouting alongside KiCad https://freerouting.mihosoft.eu


That used to be semi-attached to KiCAD, but due to some whining, it no longer is. Its author had worked for a company that did routing software, and they were huffing and puffing about him competing with them, although they didn't apparently have the contractual rights to stop him.

I used it to route a board, and it was kind of touchy, but did the job.


Most importantly, KiCad needs funding: https://funding.communitybridge.org/projects/kicad


How/where are people getting their PCBs manufactured and assembled? Are cheap chinese services reliable? How do you protect your IP when using manufacturing services?


The first thought you should be having is what are you actually protecting? Is the value of your product in the PCB? Keep in mind that even moderately complex PCBs can be reverse engineered relatively easily.


This.

If you are putting your secret sauce in the PCB, you’ve already lost. Doesn’t matter if your board is one later or twenty.


Still using OSH Park, never had an issue.

Your secret IP had better not be your circuit board. That’s a losing proposition.


OSH Park and OSH Stencils are both great!


If you open-source your "IP" (I'm quoting it, because the very name offends me), the problem magically goes away.

But then, that's something culturally almost impossible to even imagine from people who hark from the HW design world.


When you open source your hardware IP, you can buy it from Aliexpress few weeks later. That’s why I’ll never put final design on public github repository. For first prototype it’s ok. Final design brings in a cost of few thousand euros for electromagnetic compatibility measurement and I’ll definitely not give away this one.


> When you open source your hardware IP, you can buy it from Aliexpress few weeks later.

Sounds like an easy way to get others to do your work for you for free. Win win. Why go through the hassle of establishing a supply chain. So what's the catch? Why are we still labouring instead of waiting for our products to magically ship themselves through Aliexpress?


I do a lot of small-batch hobbyist stuff and I've had really good results from PCBWay and JLCPCB - boards usually show up in about a week via DHL.

Never seen my IP show up anywhere but it's generally not very interesting to begin with :P


Your IP is in more danger when sending your designs to China for cheap fab, but is safer when going with more expensive local options (PCBTrain, for example).

It's all about trust.


I use JLCPCB for most everything.

However, they're REALLY prickly about fabricating PCBs with lower tolerances (e.g. drills or cuts too close to PCB edges), and often refuse to fabricate them. I use ALLPCB in those cases.

As my designs are small hobbyist projects just for myself I don't really care about potential IP issues.


CircuitHub. They are manufactured in Massachusetts so US IP laws would apply.


1. I use PCBWay, a chinese fab that can manufacture small quantities for like $5 (+$18 shipping if you want them fast) but they arrive in five days.

2. Protecting your IP with your PCB design isn't something you can really do. Any PCB can be reverse engineered very easily. Besides, if you're asking this question on a random internet forum, I have to doubt you have any serious IP to worry about.


Can vouch for PCBWay, inexpensive and fast (even with DHL shipping from China).


Nothing bad about KiCad (don’t know it), but the Linux foundation have recently been caught neck deep in what seems like a (needless) identity politics controversy.

TLDR: it kicked out white males trying to mostly have a reasonable conversation on Twitter from attending its events, while allowing an openly and viciously racist and sexist black woman to attend the same event, with her asking for “safe spaces” to top the irony.

Needless to say, my respect for the Linux foundation has plummeted. They’re clearly off my donation-lists now.




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