We do want the chip to be "large" eventually. The scalability doesn't have anything with those, however. Refrigerators are pretty large and these devices are really really tiny; also qubits shouldn't be spaced "far" apart, this would kill all the (controllable) couplings.
I was a little too fast and loose in my previous post. You are correct that we want a large [number of qubits] on a chip eventually. The chips are tiny and the fridges large enough for now (50 qubits). It's not clear to me that they can handle thousands of qubits as imagined. The cryostat will undoubtedly be able to house the chip, but the extra electronics / cables must run in there as well. With 1000 qubits and 2 cables per qubit this will be a major challenge.
You are correct about the coupling of the qubits, I was simplifying too strongly there.
I do stand by my scaling point (center qubits harder to reach) but I'm open for counter arguments.
There is a scalability problem but due to different reasons. See my other comment in this thread for details.
Classical circuitry is an issue, but not as much as you think. What happened is Martinis' group and others moved forward with a quick & dirty design which worked well for their device but can't be scaled (they basically didn't have the expertise like silicon people had). Nevertheless, it's not a fundamental problem, the circuitry for silicon based spin qubits never had this problem for example and xmons won't either, they just keep reiterating as the number of qubits increase, it's the least of their worries regarding scalability. There are far bigger problems regarding the scalability.
I agree on your other points and trust that you are more qualified to judge what the biggest obstacles are.
Do you have a paper I can look into that goes into the chip architectures in more detail (not specifically for this new device)? Otherwise I'll await the science / nature paper of this demonstration.
The classical circuit is mostly outside the cryo I assume since it's GHz's and LNAs are available. Do you know if the microwave readout signal is frequency multiplexed to reduce cables?
When you say chip architecture, I assume you mean how to assemble together qubits like an integrated circuit. Here's one proposal for silicon based qubits: https://www.nature.com/articles/s41467-017-01905-6
Microwave signals are typically used for control rather than readout. I don't know if this experiment does it or not, and I am not an experimentalist. Multiplexing is more typically required for reducing timing errors of simultaneously driven signals (for better synchronization) and it really depends on the device and the mode of operation, plus whether the experiment they're doing needs it or not. The same experimental group sometimes do it one experiment and not do it in another, despite using the same device.
