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What Makes a PDP-11/35 Tick? (loomcom.com)
32 points by bcaa7f3a8bbc on June 9, 2019 | hide | past | favorite | 13 comments



Somewhat related, here's a 6502 compatible CPU made from a bunch of ttl logic chips: https://c74project.com/

It even boots up in a VIC20, and can run at 20x the clock speed of the real 6502.


Neat. Makes me wonder if in 25 years, hobbyists will build a 64 bit Intel x86 CPU entirely in ttl logic, at 20x the clock speed.


A modern x86 CPU built out of TTL logic would be huge, slow and use lots of power. Comparing number of transistors:

- 6502: 3500 transistors[1]

- Intel Core i3: 382 million transistors,[2] or roughly 191 million transistors per core.

So a single core of a modern x86 processor built with TTL would have 55,000 times the number of chips of a TTL 6502. Most people wouldn't have the space, power or cooling capacity to run that.

Also, it would be much slower than a single chip x86 CPU, since it takes time for signals to travel between discrete chips, due to having to drive the capacitative loads of the I/O pins (and traverse a much larger distance). There's no way that TTL could run at gigahertz clock rates.

The only reason why a 6502 made of TTL can be faster than a real 6502 is that the 6502 was a very slow processor. Its clock speed was only 1 - 3 megahertz.[1]

[1] https://en.wikipedia.org/wiki/MOS_Technology_6502

[2] https://en.wikipedia.org/wiki/List_of_Intel_Core_i3_micropro...


"Modern" 6502 processors are rated for 14MHz[1].

[1] https://www.mouser.com/ProductDetail/Western-Design-Center-W...


Aren't most of the transistors in a modern CPU used for cache, not to mention additional processing units?


I accounted for the additional processing units by dividing the number of transistors by the number of processor cores on the i3 chip (there are two).

Since the question was asking about getting performance that's comparable to the original processor, we'd need to keep the cache.


I don't think you need to keep all the cache.The cpu will be much slower due to the slower chips and propagation delays so it will be much better matched to memory speeds. Which would make cache misses much less important.


(and TTL doesn't run at gigaHz)


Why would anyone want to do it, even. There is no beauty in modern CPUs and a lot of bloat.


The claim of bloat is well, questionably, any justification for that? Bloat where, in the instruction set or something else? Honest question.

If you want a elegant ISA, the Alpha was elegant to the point of beautiful, although I only read up on it, never used it. Take a look.


They won't. Moore's law hit a wall. And even if it didn't, Einstein gets in the way with his pesky speed of light delays.


It will be on an FPGA like device. We've already got a 186: https://hackaday.com/2017/11/03/386-too-much-try-a-186-in-an...


In 25 years, hobbyists will be running quantum emulations of nostalgically contemporary operating systems and cloud servers.




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