I was completely dazzled thinking "what to they get from that?" until it hit me that only Cadence has 7nm TSMC and Samsung workflow ready.
This made me thinking, is Intel finally thinking about doing 7nm tapeouts at TSMC or Samsung?
Other possibilities off the top of my head might be Cadence being able to do stuff that's now required for these smaller and using EUV lithography nodes, and/or a backup in case their "10nm" never makes it, and their "7nm" having problems or also failing. Embarrassment should be preferable to the worst case alternatives, and we have no reason to believe Intel will be able to regain its ability to move to smaller nodes.
I think you're not right, unless I am missing something.
To my knowledge, they are the only one who have just anything workable for EUV based processes.
For example Intel's 10nm is equivalent Samsung's 7nm. They both have a pitch of around 40nm.
They are measuring the smallest feature size - the smallest shape that is reliably replicated across the wafer. Actually pretty impressive when you think about the lithography behind it.
This is why people are moving away from planar transistors to "FinFets" and eventually having an "all around gate"
Today Even with Nvidia 1080 cards running 2k x 2k per eye headsets is not an easy task and beyond a smooth VR experience.
Current Nvidia is 12 nm I believe, so the question si what is the possible pixel count bump.
I don't think 35% at fixed frequency makes sense; 35% is the frequency boost (with power savings too).
Of course this does not take into account about TDP, Clockspeed, Memory Speed, Cost of Die Size etc. What is technologically possible may not be economically possible. We are going to need much faster memory, GDDR7? or HBM3, how much would those cost?
And a 3nm ( Whether that is from Samsung or TSMC ) Nvidia GPU will likely be 2022 or 2023 at the earliest.
That seems really optimistic to me.
New processes almost always have a yield drop, followed up by recovery, but anything below 50% is really unprecedented.
Apple 12 is not that of a huge chip. It is big for a mobile SoC, but smaller than say a mainstream gaming grade GPU.
I greatly doubt the use of MBE, most likely some regular kind of epitaxy + a lot of process control and swearing to get it right. MBE would've increased cycle times way too much (need for ultra deep vacuum and 0 impurities)
Power @ Fmax -40%
Power @ isoperf -50%
Different parts of Samsung aren't talking to each other.