And in fact I'm not aware of any such systems. Existing 32+ bit embedded architectures like MIPS, RISC-V, Xtensa, and ARC all have robust instruction sets with large register files and a fully-defined SysV-style C ABI.
No, the reason is as stated elsewhere. Rust doesn't run on these systems because no one bothered to tool up LLVM for them.
Part of the problem is that LLVM developers themselves are apparently unwilling to release support for architectures that they see as liable to go unmaintained and bitrot in the future, even if someone shows up and does the work. There is a notion of "experimental arch's" but it doesn't seem to be actively used, or to suffice in addressing the issue.
Experimental archs were just used recently for wasm and riscv to find maturity.
Are you referring to a specific discussion on the llvm-dev list? Last one that had a discussion in this area that I recall was Nios2.
I'm interested in soft processors on FPGAs and their tools, and that sounds like it might make for good reading.
As best I can make out, the only relevant portions of the original SysV ABI document are chapters 4 and 5, still available and maintained on the SCO website:
There are also separate documents defining the details of the SysV ABI for each processor family. This StackOverflow answer links to some:
... and the OSDev Wiki links to many more: