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I think that commenter may have confused it with the 2-bit-per-cell ROM that it has:

https://en.wikipedia.org/wiki/Multi-level_cell#Multi-level_c...

"For example the Intel 8087 used two-bits-per-cell technology, and in 1980 was one of the first devices on the market to use multi-level ROM cells.[9][10]"

...and indeed I thought this article would have a mention of it. Certainly interested in any more exploration you can do about that.




I read out the constants from the ROM earlier and it was just a normal ROM, so I was skeptical about your comment. But what do you know, I just took a closer look at the microcode ROM and there are indeed 4 different transistor sizes! I hadn't even noticed, so thanks for mentioning this.

This will be annoying if I try to visually read out the microcode values since I'll need to examine each transistor closely. It was quick to read out the constant ROM since I just needed to glance to see if a transistor was present or not.

Here's a photo of a 7x5 region of the microcode ROM to help the discussion. The transistors (representing bits) are where the vertical polysilicon lines cross the pinkish doped silicon. Note that the "neck" is full-width, narrowed, very narrow, or entirely gone (no transistor), corresponding to the 4 values.

Image link: https://photos.app.goo.gl/pUsZSs3rx45Ry7U1A


Excellent photo. I'm surprised that the difference between the 4 levels is even visible, since I thought they would've done it by some non-obvious method like adjusting threshold voltages through implants. (The latter method was employed as a sort of obfucatory copy-protection for the Z80.)


That is very likely what I was remembering. As I said, this was long ago (as in 30+ years ago) so I very well may have been remembering this multi-level ROM setup and mixing it up with three valued logic.

I do concur that this would be an interesting topic for another post.




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