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The Tyranny of the Clock (2012) [pdf] (auburn.edu)
51 points by evilops 8 months ago | hide | past | web | favorite | 4 comments



The author's more recent work is here:

http://arc.cecs.pdx.edu/publications


Related talk by the author (Ivan Sutherland): https://www.youtube.com/watch?v=jR9pAaQlVRc


When I read the title I was reminded of this

https://youtu.be/tVT2Xi1kwx0


in verilog there is a distinction between asynchronous combinatorial logic and synchronous sequential logic

wires are treated as transmission lines




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