From a commercial perspective, I'd imagine finding customers who want the CPU, as-is, off the shelf would be rare. But, making adjustments to the inherently fragile design is going to be expensive and time consuming. Even if the customer has deep pockets they probably won't be willing to wait 1 year for a tape out.
My point was that clocked design is such an orthodoxy that you can almost not find any information and more specifically methodologies to attack asynchronous H/W design problems.
To use an analogy, the vast majority of electronics is digital these days, because analog is darn hard and digital brings in discipline and guarantees but it doesn't mean the subject of analog electronics isn't explored just because it's hard.
That is, outside of things like SERDES links, which are a tiny dark cabal that holds their secrets close :)
As for research there's plenty. I linked slides from an undergraduate course because you wrote that your background leaned more towards computer science. Finding research in this topic is as easy as doing a search through IEEE.
I agree that async design is worth researching, but there is a good reason that undergrad level digital design assumes sync.
The game may change going forward since Dennard scaling is dead. 'deepnotderp probably has some interesting insights on this topic, perhaps he will chime in.