This appears to be from 2004, and it uses PCI (a now outdated and unused bus - everything is PCI Express now, which is completely different). However, if you’re interested in the low-level details of ethernet interfaces, or how an FPGA design goes from concept to completion, this is very informative.
It’s also worth noting - more to the point of the paper - that there are companies offering FPGA-based gigabit NICs right now. You can define custom packet-handling logic in silicon. Pretty neat.
> a now outdated and unused bus - everything is PCI Express now, which is completely different
To be totally fair, the PCI interface is delegated to a sub-FGPA on this design, so it probably wouldn't be that big of a schlep to convert.
> It’s also worth noting - more to the point of the paper - that there are companies offering FPGA-based gigabit NICs right now. You can define custom packet-handling logic in silicon. Pretty neat.
That existed then too. This paper is about an AVNet board.
Here are some links for Project Catapult (Microsoft Research initiative for large scale FPGA deployment in DCs) which includes Project brainwave (TPU competitor):
It’s also worth noting - more to the point of the paper - that there are companies offering FPGA-based gigabit NICs right now. You can define custom packet-handling logic in silicon. Pretty neat.