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Design and Evaluation of FPGA-Based Gigabit Ethernet Network Card (2004) [pdf] (semanticscholar.org)
75 points by godelmachine on May 9, 2018 | hide | past | favorite | 10 comments



This appears to be from 2004, and it uses PCI (a now outdated and unused bus - everything is PCI Express now, which is completely different). However, if you’re interested in the low-level details of ethernet interfaces, or how an FPGA design goes from concept to completion, this is very informative.

It’s also worth noting - more to the point of the paper - that there are companies offering FPGA-based gigabit NICs right now. You can define custom packet-handling logic in silicon. Pretty neat.


> a now outdated and unused bus - everything is PCI Express now, which is completely different

To be totally fair, the PCI interface is delegated to a sub-FGPA on this design, so it probably wouldn't be that big of a schlep to convert.

> It’s also worth noting - more to the point of the paper - that there are companies offering FPGA-based gigabit NICs right now. You can define custom packet-handling logic in silicon. Pretty neat.

That existed then too. This paper is about an AVNet board.


There is an ongoing project called https://netfpga.org/, with several variants up to 100GBit/s.


Microsoft uses An FPGA NIC in every Azure server today


Here are some links for Project Catapult (Microsoft Research initiative for large scale FPGA deployment in DCs) which includes Project brainwave (TPU competitor):

Landing page: https://www.microsoft.com/en-us/research/project/project-cat...

Talk: https://www.youtube.com/watch?v=-NJ-faSklzs

Blog post: https://blogs.microsoft.com/ai/the_moonshot_that_succeeded/


a good place to shove it: imagine how much they save on intra-dc encryption offloading, real time compression or traffic shaping


Amazon also do similar with their ENA [0]. James Hamilton talked about it in 2016 [1].

[0] https://aws.amazon.com/about-aws/whats-new/2016/06/introduci...

[1] https://www.youtube.com/watch?v=AyOAjFNPAbA&t=1820


The youtube link at the 35:00 mark says that the networking is an custom ASIC not an FPGA. "Amazon Annapurna ASIC" is what the slide says.

Are the ENA instances using something else?


First gen ENA (never publicly acknowledged AFAIK) was an FPGA, second gen is an ASIC.


Can you say what additional processing those FGPAs in Azure are doing?




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