Note that "high" and "low" here are quite different from the usual digital logic conventions of high=+V, low=GND; in this case, high would be near GND while low is a negative voltage. The circuit manual PDF gives low=-30 and high=+10. A lot of other early transistor logic families operated with such "unusual" (for today) signal levels too.
The other notable characteristic of tube circuits is the high resistor values --- this is because they operate at low current (in the mA range) but high voltage (hundreds of voltages). Contrast this with transistor logic which is relatively high current and low voltage.
One amusing component I found in the tube module was "Vitamin Q" capacitors.
Those are actually very desired by audiophiles, so it's odd to see them in a digital circuit. They're paper-in-oil capacitors and "Vitamin Q" was Sprague's trade name for the proprietary oil they used.
One wacky thing in IBM's transistor computers is that they would alternate NPN and PNP gates. This avoided an extra transistor in each gate to shift the voltage level back. So you'd end up with one gate using +12V/0V logic levels and the next one using +6V/-6V.
This technique was used in three different transistor logic families, each with their own voltages. So there were 6 different transistor logic levels, plus other miscellaneous logic levels (e.g. 48V relays). IBM's old computers were a crazy collection of different voltage levels.
Huh? The gate resistance of a FET is hundreds of megaohms, so the input current is measured in nanoamps. That doesn't seem like high current to me.
This is different from current-steering based logic (all kinds of ECL, including CML/SCL) were the current in the circuit stays the same, but only takes a different path depending on state. Supply current is largely independent of circuit state with these.
The modern FPGA circuit first passes the input through two latches to synchronize it to the system clock, and then has a digital counter to add a delay to rapid bounces. Here the delay is analog, and there is no clock input: the output digital signal is still completely asynchronous.
I wonder if they needed a second module to synchronize the signal and avoid metastability issues, or maybe that doesn't matter at the low clockspeeds they were using?
In discrete logic debouncer designs with RC-filter that are quite similar to this tube circuit are still widely used and to some extent the modern designs are more similar to this when the schmitt trigger is realized as input of some MCU/FPGA and only external parts is the RC filter in contrast to tradditional discrete logic solutions which usually placed the filter between two schmitt trigger gates.
By the way adding such external RC-filter (or even just series capacitor across the contacts) is quite cheap and quick fix for worn-out rotary encoders on various devices when existing (usually software) debouncing logic stops to be sufficient.
What about debouncing with a low-pass filter, followed by a Schmitt trigger?
The two inverter-tubes share a common cathode resistor. This provides positive feedback from the second inverter to the first. The circuit is called a Schmitt trigger:
And that's when you're doing a not so streamlined circuit, and can't have them inside your ASIC or something, if you can it gets even smaller
Texaco: accounting, technical and research applications. The accounting applications are integrated crude oil, integrated gas and gasoline, wholesale marketing, payroll, supply, and distribution. The technical and research applications are producing geophysical, petroleum engineering, civil engineering, refinery simulation, crude evaluations, plant process studies, pipe stress analysis, and determination of maximum allowable operating pressures.
Calculations related to crude stills, fractionation, absorption and stripping are also performed.
U. S. Army, Pentagon: military personnel accounting, civilian personnel accounting, and organizational accounting.
AT&T Long Lines Dept: circuit provision, traffic load studies, accounting for
operating and construction activities, message analyses (by mid 1960), pricing and billing private line customers (by late 1960), and plant trouble results - message circuits.
National Security Agency: the system is used for data processing. [no details :-) ]
These are just a few uses from a detailed 1961 report: http://www.ed-thelen.org/comp-hist/BRL61-ibm0705.html
One of my mentors was a statistician who got into IT while transitioning a large state labor statistics department to computerization in the 70s. They replaced 2000 clerks and tabulating machines with 1 mainframe and a 4 year project. Ditching the building lease and tabulator maintenance paid for the project!
It takes them over an hour to run the payroll for 5000 people due to terribly written SQL queries. It's like we've gone backwards.
Where and when did we go wrong?
As far as tubes, the 700-series circuit manual  shows mostly dual triodes: 6211, 5687, 5965, 6350, 6072, 6528. Also 6136, 6197 pentodes. And probably a variety for special cases (e.g. power supply, core).
I hadn't heard of Eccles and Jordan before this article; I had previously believed that the flip flop was invented by Eckert and Mauchly. Good to know!
What a weird coincidence in one day.
The real debouncer hardware is also in the keyboard itself for all standard external keyboards ever used with PC.
On the other hand there were simple keyboard interfaces which involved reading out the whole keyboard as if it was one big shift register and debouncing was then done on the host side in software, two examples from top of the head are Symbolics machines and Wyse terminals. Interface for (S)NES controllers (really for Nintendo controllers up to GameCube) is similar, but I'm not sure whether debouncing is done by controller hardware or not.
I never would have guessed that debouncing was first used to tame physical keys bouncing on contacts.
> The default keyboard handling on a DOS PC are meant for typing. So any time you hit a key there is a debounce before the key is allowed to repeat continuously, usually on the order of a quarter second to a half second.
What he is describing is the keyboard driver autorepeat feature, if you hold down a key for a while the driver will generate a sequence of virtual keypresses. This is just a software convention, it's also possible to read the state of the keys directly (pressed down or not) instead of treating them in terms of key-press events. Using the word debouncing for this is incorrect.
Debouncing happens on a millisecond time scale, it's due to the key actually physically bouncing.
More precisely: it is due to the contacts bouncing, they don't close just once when they touch each other, they rebound and close again, this repeats a number of times before they finally settle.
This code works by tracking state of modifier keys (and setting the keyboard LEDs appropriately) and converts key down events for other keys into keycode/character pairs.
DOS in turn provides function INT 21, AH=07 which is thin wrapper on top of INT 16h which waits for key press and returns it as either ASCII character or zero followed by extended scan code (returned on second invocation) for non-ASCII keys (this DOS function is what is called by readey() in Borland Pascal/C++).
Edit: it is not as thin wrapper as it looks like, because it does not blindly call into BIOS and block there, but loops in DOS code and calls INT 28h until key is ready. INT 28h is intended as a hook for TSR to either do unimportant background processing (kind of poor mans multitasking) or call into DOS when it is known to be safe to do so. Particularly interesting thing to do in INT 28h handler is executing HLT in order to conserve power as any condition that would cause DOS to exit from this loop generates interrupt.