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The internal caches have ECC but rowhammer targets the DIMMs. ECC DIMMs would solve the issue but Intel, for market segmentation reasons, fuses off the ability to handle ECC memory in consumer chips.



ECC doesn't protect against rowhammer though. It makes it more difficult but not impossible.


If you shut down whatever is triggering errors instead of completely ignoring them, the difficulty level is pretty close to "impossible".




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