TL;DR: A distributed "nano-processor" [1] architecture with a bunch of neat tricks to allow the "nano-processors" to coordinate with the help of a master processor.
It looks like it could have potential if they come up with a sensible paradigm to progam it. Unfornately it looks like they're trying to shoehorn C into an architecture that's wildly different than C's original target. [2]
I don't really see this taking significant market share from FPGAs/ARM in its current state.
[1]: they use the term ensemble but that is unintuitive
I look forward to reading this. A system that can really do better than FPGAs and ASICs at compromising between speed and programmability is a multi-million dollar breakthrough.
It looks like it could have potential if they come up with a sensible paradigm to progam it. Unfornately it looks like they're trying to shoehorn C into an architecture that's wildly different than C's original target. [2]
I don't really see this taking significant market share from FPGAs/ARM in its current state.
[1]: they use the term ensemble but that is unintuitive
[2]: http://cva.stanford.edu/projects/elm/compiler.htm